! |
! MGTBL N. KAMIKUBOTA 26-OCT-1988 |
! |
! BEAM TRANSPORT MAGNET TABLE, for MGLIB v3.0 (or later) |
! |
! Modifications : |
! n.k. apr.26.1993 for mglib v3.0, 0-1-2 and P(partly) sectors |
! n.k. may.12.1993 change orger to follow cntroller-#, add P-sector(partly) |
! n.k. may.25.1993 fill for all, change key-names (C1,C2,..->A2,A6,..) |
! n.k. june.1.1993 add BTx-x (PS-controllers) |
! n.k. july.6.1993 add QM1-12D/F |
! n.k. oct.19.1993 L3-1-1:45->L3-1-2, L3-5-1:44->L3-5-2 |
! n.k. nov.15.1993 remove ST1-SY1Y/SY2Y,BM1-SY2S; |
! add B6-S1/S2 from the Beam Transport list |
! n.k. nov.17.1993 add STCP-B7X/Y,STCP-52X/Y,STCP-54X/Y to BT-list |
! n.k. feb.23.1994 Q5-8B 60A=>50A max |
! n.k. feb.28.1994 for e+: L3-P-3 ==> L3-P-2 |
! k.f, sep.7.1995. remove EMS add ST0-06,07 |
! k.f, sep.7.1995. change all magnets in 2sector |
! n.k, dec.7.1995. QM2-64A/B: calib(bi-pol ADC), QM2-34A/B: INTL FE->BE |
! n.k. Mar.5.1996 add STCM-1X/Y (L3-M-2) for PLC test |
! a.s. Mar.6.1996 add QM2-22J,..,QM2-44F (L3-M-1) for PLC |
! nk+as Mar.10.1996 add FC0-A/B/C/D, modify 2sector |
! n.k. Mar.13.1996 rename "Q1-xx" to "QM1-xx" |
! k.f. Mar.15.1996 change controller address at 3-B from 4E to 4C |
! k.f. Mar.16.1996 change e+ type ST magnet attributes |
! s.k. Mar.21.1996 modify interlock bit (replace mg) |
! t.o. Sep.19.1996 add ST2-81xy ~ 2-83xy. modify ST3-11xy ~ 3-43xy |
! t.o. Sep.27.1996 add QM2,3sector. rename Q3-2A~3-4B QM3-24D~3-44F |
! k.f. Dec.4.1996 add BM2-ANA(S) |
! k.f. Dec.14.1996 add plc controller |
! k.f. May.7.1997 exchange controller in injector, rename st1, qm3-*, qm4-*, qm5-* |
! k.f. May.8.1997 rename several, change max current, and other fixes |
! k.f. May.21.1997 change address of bt0-2 4E -> 4D |
! n.k. Jun. 4.1997 QM1-54D->QM1-84F, change MAX 30/50A->20A |
! n.k. Jun. 9.1997 add BM1-BCS etc. |
! n.k. Jun.23.1997 change max cur of QM2-2x/3x |
! k.f. Jun.27.1997 add many aliases |
! k.f. Jul.4.1997 add QD/F_18_4 |
! k.f. Aug.12.1997 add names in B sector as aliases of names in 3sector |
! s.k. Sep.25.1997 modified BM2-ANA max current from 450A to 380A |
! n.k. Oct. 1.1997 magPCmgr&PLCcontrollers, mgv3tbl->mgtbl, add "SECT" (v3.7) |
! k.f.+n.k. Oct. 9.1997 add info for A,B,R sectors |
! k.f. Oct.14.1997 add magnet names aliases (as well as p.s. names) |
! n.k. Oct.14.1997 enable B-sector, BM_A1_A_POL, BM_A4_A_POL |
! n.k. Oct.16.1997 {BM_A1_A-POL, BM_A4_A-POL} -> {BM_A1_A_POL, BM_A4_A_POL} |
! k.f. Oct.17.1997 change alias handling in A,B sectors, using fake node |
! k.f. Oct.23.1997 replace BM_A1_A |
! n.k. Oct.25.1997 BM_A4_A:interlock FE->BE |
! k.f. Oct.28.1997 replace ps for BM_A1_C? and BM_A1_A |
! n.k. Oct.28.1997 add BM_A1_C1/2/3/4_POL |
! k.f. Nov.13.1997 add BS_A1_C2/3 |
! n.k. Nov.14.1997 change max-A of QM1-14D/F 20->5 FE->BE |
! k.f. Sep.30.(Nov.25.)1997 exchange names of qf_61_6 and qd_61_6 |
! k.f. Oct.1.(Nov.25.)1997 exchange names of qf_61_8 and qd_61_8 |
! n.k. Nov.25.1997 calib. coefi. fix for SX_B5_1 - SY_B6_3 (magplcb-b2) |
! k.f. Nov.26.1997 exchange names of s[xy]_58_3 and s[xy]_61_8 |
! k.f. Jan.7.1998 define new names and remove old names, add C sector |
! using nameconv.sh, magnamerc2mgtbl.sh, extractalias.sh |
! k.f. Jan.9.1998 remove duplicates, QD/FC84, S[XY]C8[13], BS61L1, BM62A1 |
! k.f. Jan.9.1998 rename FC_21_T/35, FC_21_11/34, FC_21_21/44, QF/D/F_22_12 |
! QD/F/D_22_31, QD/F/D_22_41, QD/F/D_23_21 |
! k.f. Jan.11.1998 add BS_B1P, BS_61_A1, SY_64 |
! k.f. Jan.13.1998 exchange sx_22/23 and sy_22/23 |
! k.f. Jan.20.1998 change max current of QD/F_1[23]_4 |
! k.f. Feb.25.1998 several magnet removals and interlock modif. in C sector |
! k.f. Feb.27.1998 add BS_A1_A and BM_R0_D |
! n.k. Mar. 5.1998 doubly defined - QD_C5_4 , QF_C5_4 |
! k.f. Mar.27.1998 change Q/BM in A, Q/ST in C, FC/Q in 1, Q/ST/BM in ECS |
! n.k. Mar.30.1998 rename L3-2-7/8 -> L3-M-7/8, remove BM_17_C1/2/3/4 |
! s.k. Apr.01.1998 modified interlock bit bm_61_1/6 |
! k.f. Apr.14.1998 remove BT2-8 |
! k.f. Apr.24.1998 change MAX for Q[DF]_A1_(2|B8|C5), Q[DF]_61_(6|8) |
! s.k. May. 8.1998 change MAX for Q[DF]_21_K5, Q[DF]_61_(6|8), and CH for |
! S[XY]_C8_(1|3). replace QD/F_(C7|17)_4 -> Q[DF]_(C7|17)_4 |
! k.f. May. 8.1998 change MAX for Q[DF]_A1_(2|C5) |
! k.f. May.11.1998 add BS_A4_4, change MAX for BM_61_A1/2/3 |
! k.f. May.12.1998 change QD/F_17_C[45] into Q[DF]_17_C4/5 |
! s.k. May.12.1998 change interlock bit QD_23_11, QF_22_44 |
! k.f. May.15.1998 add BM_17_C, BS_17_C[1234] |
! k.f. Jun.2.1998 move S[XY]_17_C4 to magplcBCS, remove S[XY]_21_T |
! k.f. Jun.11.1998 add BM_61_A1_POL |
! s.k. Jun.13.1998 change max current QF_58_3(for PS change) |
! n.k. Aug.25.1998 change QF_R0_23/41 (kamitani+oogoe) |
! s.k. Aug.27.1998 change max current QD/D_48_4 QF_48_4 from 60A to 30A |
! s.k. Sep.25.1998 change statas Q[DF]_11_4,_12_4,_15_4,_16_4 from F6 to FE |
! n.k. Apr. 1.1999 BT4-1 : L3-4-2:41 to magplc4-A |
! k.f. Sep. 1.1999 rename xx_58_3 to xx_58_4 |
! t.o. Sep. 2.1999 change all e- type loop3 controllers into yew plc |
! k.f. Sep. 2.1999 remove s[xy]_21_t |
! t.o. Sep. 3.1999 remove sector 0( change to C ). add sector 6. |
! t.o. Sep. 5.1999 follow PwrSupplies changes by OOgoe-san |
! k.f. Sep. 8.1999 remove BM_R0_D |
! k.f. Sep.16.1999 change A2-AE for Q[FD]_2[6-8]_. |
! k.f. Jan. 3.2000 rename some S[XY] into B[XY], QD_58_4 with 50A max |
! k.f. Jan. 6.2000 add S[XY] aliases to B[XY] |
! k.f. Mar.28.2000 change interlock bits from F6 to FE for Q[DF]_1[1256]_4 |
! s.k. May.14.2000 change QF_A3_4 PS |
! s.k. May.31.2000 change QD_23_42 PS. modified max curr to 30A from 33A. |
! s.k. Jun.15.2000 change QD_23_42 max curr to 33 from 30 |
! n.k. Jun.15.2000 change bit QD/F/D_22_31, QD/F/D_22_41, QD/F/D_23_21 (70->BE) |
! change bit QF_A2_3 (FE->38) |
! n.k. Sep. 5.2000 remove all of Loop3 - add magplc0-11/0-12/2-A1/2-A2/2-A4/2-A5/3-A1/3-B2 |
! n.k. Sep.12.2000 disable non BT-mag (modify TYPE to 4000 etc.) |
! n.k. Sep.25.2000 name changes (FC_21_xx, 3PSs.) |
! k.f. Sep.26.2000 exchange Q[DF]_A1_C5 |
! k.f. Sep.28.2000 change interlock status for BM_21_K[1-4] |
! k.f. Sep.29.2000 add Q[DF]_61_A1 |
! k.f. Sep.30.2000 change Q[DF]_58_4 from 50A to 60A |
! k.f. Nov.16.2000 change interlock status for magplc0-11, magplc2-A1 |
! n.k. Aug.30-31.2001 changes in summer maintenance |
! k.f. Sep.9.2001 replace Q(D/D|F)_21_K5 |
! n.k. Sep.12.2001 change BM_A1_A, S[X,Y]_31_1 BM_17_C1/2/3/4 |
! n.k. Jan. 4.2002 change MAX of QD/D_21_K5, QF_21_K5, BX_61_H1, |
! remove BM_17_Cn aliases (BM_17_C1 etc) |
! s.k. Aug.18.2004 change interlock status for FC_A1_S9 - FC_A1_B4/5, QF_A2_3 |
! k.f. Aug.30.2004 change interlock status for BM_21_K1/4 |
! k.f. Sep.8.2004 re-enable aliases BM_17_C[1234] |
! k.f. Jun.2.2005 change maximum current of FC_CT_G7/8 from 20A to 35A |
! t.k. Jul.29.2005 change maximum current of FC_CT_G7/8 from 35A to 20A |
! k.f. Aug.3.2005 change interlock status for [SB][XY]_A1, FC_A1_B[678] |
! s.k. Aug.26.2005 change interlock status for [SB][XY]_[345] Q[DF]_2[] |
! k.f. Aug.29.2005 add QD_44_1,QF_44_3, BT5-7(6-A), B[MS]_58_1,??_61_F? |
! s.k. Aug.25.2006 change maximum current S[XY]_A1_G0... |
! k.f. Sep.10.2006 modify calibration data for BS_28_A |
! k.f. Sep.21.2006 remove BS_61_L |
! k.f. Nov.16.2006 prepare 13 magnets for slow positron |
! s.k. Jan.05.2007 interlock change |
! k.f. Jan.25.2007 add magnets for slow positron |
! s.k. may.31.2007 change interlock bit in slow e+ STC |
! s.k. aug.22.2007 change interlock bit in 3 sector STC |
! s.k. sep.04.2007 change interlock bit |
! k.f. sep.88.2007 change max of Q[FD]_A3_4, Q[FD]_A4_[24] |
! s.k. jan.09.2008 add BY_61_F0 |
! s.k. feb.07.2008 add BT2-8 PX_17_C1, PX_17_C5, PX_21_45, PY_21_45 |
! k.f. jul.25.2008 change interlock bits for QF/D_22_2(1/2|3/4), Q[DF]_61_A1 |
! n.t. aug.13.2008 change interlock bit of QF/D_22_21/2,QF/D_22_23/4 |
! n.t. aug.14.2008 change interlock bit of Q[FD]_61_A1 |
! k.f. sep.11.2008 remove BS_58_1, B[MS]_17_C[1234] |
! s.k. nov.18.2008 add P[XY]_28_4,P[XY]_38_4,P[XY]_48_4 |
! k.f. nov.20.2008 change interlock from 10 to 14 at P[XY]_[234]8_4 |
! k.f. nov.25.2008 change max current for P[XY]_[34]8_4 |
! s.k. sep.08.2009 ... |
! k.f. sep.14.2009. remove P[XY]_24_4 temporarily |
! t.k. sep.09.2011. rename Q[DF]_26_*, S[XY]_26_1, SX_26_2 (connect 32 RF Gun) |
! rename QF_32_2 -> QF_32_3, QD_32_2 -> QD_32_3 |
! remove QF_32_4, QD_32_4 |
! t.k. sep.13.2011. rename SX_32_R1 -> SY_32_R1 |
! n.t, dec.28.2011 rename old Q[DF]_32_4 to Q[DF]_33_2 |
! t.k. jan.06.2012. rename QD_32_4 -> QF_32_4 |
! QD_32_R1 -> QF_32_R1 |
! QF_32_R2 -> QD_32_R2 |
! t.k. aug.02.2012. rename *_32_* -> *_26_* |
! (disconnect GU_32 mag, connect org) |
! t.k. sep.12.2012. rename BM_61_1/6 -> BM_61_1 |
! BM_61_1/6_POL -> BM_61_1_POL |
! BM_61_2/3/4/5 -> BM_61_A2/3 |
! BM_61_A1/2/3 -> BM_61_A1 |
! BM_61_A1/2/3_POL -> BM_61_A1_POL |
! k.f. sep.24.2012. rename BT5-{4,5,6} into BT6-{2,1,3} |
! t.k. sep.26.2012. add alias BM_61_1/6, BM_61_1/6_POL |
! t.k. dec.16.2012. remove BX/Y_A1_B8, QD/F_A1_B8, SX/Y_A1_B8 |
! n.t feb.21.2013. remove FC_21_[T,11/23,31/44] and S[XY]_21_[1,2,31,41] |
! n.t mar.18.2013. add magplcR-C. |
! QF_R0_14/51,QD_R0_22/42,QF_R0_23/41 is divided into |
! QF_R0_14,QD_R0_22,QF_R0_23 and QF_R0_41,QD_R0_42,QF_R0_51 |
! t.k may.27.2013. remove magplc1B1,1B2,2A1,2A2,2A3,2A5 |
! n.t jul.04.2013. remove BM_A1_C1/2/3/4,BM_A1_C1/2/3/4_POL,BM_A1_A,BM_A1_A_POL |
! BS_A1_[C1,C2,C3,C4] |
! add BM_A1_C1,BM_A1_C2,BM_A1_C3,BM_A1_C4 |
! |
! n.t mar.18.2013. SF_R0_13/52,SF_R0_21/43,SD_R0_31/33 are divided into |
! SF_R0_13,QF_R0_21,SD_R0_31 and SD_R0_33,SF_R0_43,SF_R0_52 |
! t.k sep.02.2013. remove B[XY]_A1_[22,M] |
! t.k sep.19.2013. BM_A1_C1/C2/C3/C4 MAX 35 -> 30 |
! t.k sep.20.2013. SF_R0_52,SF_R0_43,SD_R0_33 MAX 35 -> 25 |
! t.k sep.25.2013. SF_R0_52,SF_R0_43,SD_R0_33 MAX 25 -> 35 |
! m.s sep.27.2013. add QD/D_24_1, ..., QF_24_4 |
! add SX_23_11, ..., SY_24_4 (INTERLOCK: 0200 => 00F0) |
! remove QD[F]_14_4 |
! n.t sep.30.2013. BM_A1_C1/C2/C3/C4 MAX 30 -> 35 |
! t.k oct.03.2013. remove BX/Y_17_C5 |
! n.t. Oct.20.2013. QD_A1_13,QD_A1_23 MAX 6-> 10, INTERLOCK FE -> E0 |
! t.k. feb.04.2014. remove QD[F]_18_4 |
! t.k. feb.12.2014. remame FC_21_11/23 -> SO_15_11 |
! FC_21_31/44 -> SO_16_21 |
! n.t apr.10.2014. remove QD_21_4,QF_21_4,QD_22_43,QF_22_44,SX_23_11,SY_23_12 |
! n.t apr.11.2014. rename SO_15_11 -> FC_15_11 |
! SO_16_21 -> FC_16_21 |
! k.f apr.24.2014. change channel number for Q[FD]_23_4[12] |
! t.k may.01.2014. remove QD/D_A2_2, QF_A2_2 |
! t.k may.07.2014. add FC_15_T,SX/Y_15_T |
! t.k may.26.2014. add B[XY]_A2_A1, QD_A2_A1 |
! s.k may.30.2014. modified interlock bit QD/D_23_43 |
! n.t jun.13.2014, reinstall magplc1-B2 and add B[XY]_17_4,BX_23_12,BY_23_13 |
! n.t, jun.16.2014, add SM_17_[01,02,03,04,05].Temporary magnet to remove electrons |
! n.t, aug.08.2014, change Q[DF]_13_5 max curr from 10 to 20A |
! n.t, aug.20.2014, add B[XY]_30_1 |
! n.t, aug.29.2014, separate QD/D_23_43 into QD_23_43,QD_23_45 and rename QF_23_43 to QF_23_44 |
! n.t, aug.29.2014, add S[XY]_24_1 |
! t.k, sep.19.2014, rename FC_*** -> SL_*** |
! s.u, Sep.24.2014. add SL_16_11, rename SL_16_21 to SL_16_31 |
! t.k, Sep.27.2014. modify SL_16_11 CH:14 -> CH:2 |
! t.k, Sep.30.2014. remove SX/Y_C8_3 |
! t.k, Oct.03.2014. rename QD/D_A1_M -> QD_A1_M |
! t.k, Feb.27.2015. modify **_AT_** , ... |
! n.t, Mar.19.2015. remove SM_17_[01,02,03,04,05] |
! n.t, Apr.12.2015. add SL_16_33,rename SL_16_31 to SL_16_22 |
! t.k, Aug.19.2015. rename QF_31_4 -> QF_30_1, QD_31_4 -> QD_30_1 |
! n.t, Aug.19.2015. rename QD/D_28[36,38,42,44,46,48]_4, => QD_* (n.t or someone like n.t) |
! n.t, Sep.11.2015. add S[X,Y]_A1_1 |
! m.s, Feb.10.2016. modified BM_61_3/4 MAX current 500 A -> 400 A |
! m.s, Feb.25.2016. modified BM_61_3/4 MAX current 400 A -> 500 A |
! m.s, Feb.29.2016. modified BM_61_3/4 MAX current 500 A -> 400 A |
! s.k, Mar.29.2016. rename SL_15_T -> SL_13_TS, SL_15_11 -> SL_16_11, SL_16_11 -> SL_15_T/11 |
! t.k, Mar.29.2016. modified BM_61_3/4 MAX current 400 A -> 500 A |
! t.k, Sep.27.2016. add BS_AT_J1 |
! m.s, Sep.28.2016. rename BY_61_F0 -> BY_58_F1 |
! t.k, Sep.28.2016. remove QF_61_F1 |
! rename QD_61_F1 -> QF_61_F1 |
! rename QF_61_F3 -> QD_61_F3 |
! rename QD_61_F5 -> QF_61_F5 |
! t.k, Sep.28.2016. remove SY_32_R1, SX_32_R2, SY_32_R2 |
! t.k, Jan.10.2017. add B[XY]_A1_M |
! t.k, Jan.19.2017. rename B[XY]_38_4 -> S[XY]_41_1 |
! rename B[XY]_48_4 -> S[XY]_51_1 |
! remove S[XY]_53_3 |
! t.k, Feb.03.2017. rename B[XY]_A1_M -> S[XY]_A1_M |
! s.k, Feb.03.2017. rename aliase B[XY]_A1_M -> S[XY]_A1_M |
! n.t, Feb.09.2017. add S[X,Y]_AS_[1,2] |
! t.k, Mar.14.2017. remove SX_3T_G,SY_3T_G,SX_3T_G0,SY_3T_G0,SX_3T_G5, |
! SY_3T_G5,BM_3T_G0,SL_3T_G1/2/3,SL_3T_G4/5/6, |
! SL_3T_G7/8,SL_3T_P1/2,SL_3T_B1/2,SL_3T_B3/4/5/6, |
! SL_3T_B7/8/9,QD_32_3,QF_32_3,ML_3T_G,QD_31_0,QF_31_0 |
! s.u, Mar.29.2017. change max current 30 -> 35A,QD_36_4,QF_36_4 |
! n.t, May.31.2017. remove QM_28_4 - QM_58_4 |
! remove magplc3-T1,3-T2,3-A1,3-B1,4-A,4-B1,5-A,5-B1 |
! n.t Jun.01.2017 Change SX_26_1 - SY_28_3 Interlock(60 -> F0) |
! n.t Jun.02.2017. Change QM_A1_[G1,G2,01,02] Max(10 -> 5) Interlock(E0 -> F0) |
! t.k Oct.10.2017. remove BX/Y_30_1 |
! t.k Jan.04.2018. SL_15_T/11 -> SL_15_11, SL_15_T |
! m.s Jan.24.2019. add remove BX[Y]_R0_01 |
! n.t Apr.12.2019. remove Q[D,F]_C[1,2,3,4,5,6,7]_4, B[X,Y]_R0_63 |
! change max current 60 -> 50A QD_R0_63 |
! change max current 25 -> 30A SF_R0_[13,21],SD_R0_31 |
! n.t Apr.17.2019 change S[X,Y]_B[5,6,7,8]_[1,3], |
! S[X,Y]_C[1,2,3,4]_[1,3],S[X,Y]_C5_3, |
! S[X,Y]_C6_1,SX_C6_3 Interlock E0 -> F0 |
! change BY_R0_[23,41] Interlock E0 -> FE |
! |
! s.u Apr.18.2019. change interlock FE > 76 |
! SD_R0_33,SF_R0_43,SF_R0_52,SF_R0_13,SF_R0_21,SD_R0_31 |
! QD_R0_22, QF_R0_23: |
! m.s Jul.06.2020. remove QD_AT_J2, QF_AT_J3, QD_AT_J4 |
! m.s Jul.30.2020. remove QD_23_43 |
! rename QF_23_44 -> QF_23_45, QD_23_45 -> QD_23_43 |
! |
! s.u Jul.15.2021. remove magplcR-B (ARC 19inch rack) |
! remove magplc1-A2 (1AF) |
! remove magplc2-A5 (2AB) |
! remove magplc2-B2 (2B 19inch rack) |
! remove magplcECS2 (ECS rack) |
! assign BX_61_H1 from magplcECS2 to magplcECS3 |
! remove BY_58_F1,BY_61_F1,BX_61_F3,BY_61_F5,BX_58_F1,BS_61_F1,BS_61_F4 |
! |
! @(#) mgtbl.tbl sep.24.2014. version 3.85 |
! |
! |
!########## |
!----- |
!Magname Loop3-portname, or PLC nodename |
! 1-4 : ADR-# CH-# MAX-A |
! 5 : SECT |
! 6,7 : MAG-TYPE INTERLOCK |
! 8-11: ADC(0200) ADC(0600) ADC(0A00) ADC(0E00) |
!Loop3-portname="MELmn", m=MEL-#, n=CNTL-# |
! ---------------------------------------------------------------------------- |
! MAG-TYPE BIT ASSIGNMENT (SEE "MGPARA.FOR") |
! ='LOCAL DEG' 1:OK, 0:NO 0000 0000 0100 0000 * may never be used any more |
! ='POS LINAC' 1:YES, 0:NO 0000 0000 0001 0000 * nonexistent at sep.2004 |
! ='BI-POL' 1:YES, 0:NO 0000 0000 0000 0001 * unused any more after sep.00 |
! ='BI-POL VIRTUAL' 1:OK, 0:NO 0000 0000 0000 0100 |
! ='VIRTUAL MAG' 1:YES, 0:NO 0000 0000 0000 1000 |
! |
! ='OCOV AT MAX' 1:YES, 0:NO 0000 0001 0000 0000 * nonexistent at sep.2004 |
! ='BT MAG' 1:YES, 0:NO 0001 0000 0000 0000 |
! ='PS CONTROLLER' 1:YES, 0:NO 0010 0000 0000 0000 |
! ='PLC CONTROLLER' 1:YES, 0:NO 0100 0000 0000 0000 * becomes standard since sep.00 |
! ='ALIAS' 1:YES, 0:NO 0000 0010 0000 0000 |
! ---------------------------------------------------------------------------- |
! AVAILABLE INTERLOCK BIT (SEE "MGSTAT.FOR") |
! ='POWER' 1:ON, 0:OFF 0000 0000 0000 0001 |
! ='MAGNET WATER' 1:OK, 0:NO 0000 0000 0000 0010 |
! ='MAGNET TEMP' 1:OK, 0:NO 0000 0000 0000 0100 |
! ='FAN' 1:OK, 0:NO 0000 0000 0000 1000 |
! ='OVER VOLTAGE' 1:OK, 0:NO 0000 0000 0001 0000 |
! ='OVER CURRENT' 1:OK, 0:NO 0000 0000 0010 0000 |
! ='TR TEMP' 1:OK, 0:NO 0000 0000 0100 0000 |
! ='TR FAULT' 1:OK, 0:NO 0000 0000 1000 0000 (e- cont) |
! ='INVERT' 1:OK, 0:NO 0000 0000 1000 0000 (e+ cont) |
! |
! NOTE : SOME OLD MAGNETS HAVE DIFFERENT BIT ASSIGNMENT |
! --------------------------------------------------------------------------- |
! |
!separator = ' ' |
!keyword = "NAME NODE ADR CH MAX SECT TYPE INTERLOCK A2 A6 AA AE" |
!format = "%s %s %x %d %d %x %x %x %x %x %x %x" |
! |
! --------------------------------------------------------------------------- |
! |
! |
! ### A SECTOR ### |
! |
! [0] CONTROLLERS |
! |
NAME |
NODE |
ADR |
CH |
MAX |
SECT |
TYPE |
INTERLOCK |
A2 |
A6 |
AA |
AE |
BTA-1 |
magplcA-A1 |
41 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-2 |
magplcA-A2 |
42 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-3 |
magplcA-A3 |
43 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-4 |
magplcA-A4 |
44 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-5 |
magplcA-B1 |
45 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-6 |
magplcA-B2 |
46 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-7 |
magplcA-C1 |
47 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-8 |
magplcA-C2 |
48 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTA-9 |
magplcA-A5 |
49 |
1 |
0 |
A |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [9] CONTROLLER-4 at A-sector , magplcA-A5 |
! |
QD_AT_01 |
magplcA-A5 |
49 |
1 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QF_AT_02 |
magplcA-A5 |
49 |
2 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_AT_03 |
magplcA-A5 |
49 |
3 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_AT_11 |
magplcA-A5 |
49 |
4 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QF_AT_12 |
magplcA-A5 |
49 |
5 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_AT_13 |
magplcA-A5 |
49 |
6 |
5 |
A |
5000 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_AT_21 |
magplcA-A5 |
49 |
7 |
10 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QF_AT_22 |
magplcA-A5 |
49 |
8 |
10 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QD_AT_23 |
magplcA-A5 |
49 |
9 |
10 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
!QD_AT_J2 magplcA-A5 49 10 35 A 5000 FE 0200 0600 0A00 0E00 |
!QF_AT_J3 magplcA-A5 49 11 35 A 5000 FE 0200 0600 0A00 0E00 |
!QD_AT_J4 magplcA-A5 49 12 35 A 5000 FE 0200 0600 0A00 0E00 |
! |
! [4] CONTROLLER-4 at A-sector KABE "A-A (2)", magplcA-A4 |
! |
SL_AT_G1 |
magplcA-A4 |
44 |
1 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_G2 |
magplcA-A4 |
44 |
2 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_G3/4 |
magplcA-A4 |
44 |
3 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_G5/6 |
magplcA-A4 |
44 |
4 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_S1/2 |
magplcA-A4 |
44 |
5 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_S3/4 |
magplcA-A4 |
44 |
6 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_S5/6 |
magplcA-A4 |
44 |
7 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_S7/8 |
magplcA-A4 |
44 |
8 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_S9 |
magplcA-A4 |
44 |
9 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_SA |
magplcA-A4 |
44 |
10 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_P |
magplcA-A4 |
44 |
11 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_B1 |
magplcA-A4 |
44 |
12 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_B2/3 |
magplcA-A4 |
44 |
13 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_B4/5 |
magplcA-A4 |
44 |
14 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_B6/7 |
magplcA-A4 |
44 |
15 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SL_AT_B8 |
magplcA-A4 |
44 |
16 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
! |
! [1] CONTROLLER-1 at [A-A], magplcA-A1 |
! |
! t.k. Oct.18.2013 rename QD/D_A1_1 -> QD_A1_11 |
! QF_A1_1 -> QF_A1_12 |
! add QD_A1_13,QD_A1_23 |
! s.u. Oct.18.2013 Change Max Val(10 -> 6) QD_A1_13 QD_A1_23 |
! n.t. Oct.20.2013 QD_A1_13,QD_A1_23 Max Val(not limit value) 6-> 10, |
! Interlock FE -> E0 |
! t.k. Sep.22.2017 add BS_AT_J5 |
! t.k. Sep.10.2018 remove BS_AT_J1, BS_AT_J5, QD_A1_M1, QF_A1_M2, QD_A1_M3, |
! SX_A1_M, SY_A1_M |
! |
ML_AT_G0 |
magplcA-A1 |
41 |
1 |
3 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
ML_AT_G1 |
magplcA-A1 |
41 |
2 |
3 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
!BS_AT_J5 magplcA-A1 41 3 5 A 4001 F0 0200 0600 0A00 0E00 |
!QD_A1_11 magplcA-A1 41 3 5 A 5000 FE 0200 0600 0A00 0E00 |
!QF_A1_12 magplcA-A1 41 4 5 A 5000 FE 0200 0600 0A00 0E00 |
!QD_A1_13 magplcA-A1 41 13 10 A 5001 FE 0200 0600 0A00 0E00 |
!QD_A1_13 magplcA-A1 41 13 6 A 5001 FE 0200 0600 0A00 0E00 |
!QD_A1_01 magplcA-A1 41 14 10 A 5001 E0 0200 0600 0A00 0E00 |
!QD_A1_M1 magplcA-A1 41 4 30 A 5000 76 0200 0600 0A00 0E00 |
!QF_A1_M2 magplcA-A1 41 5 30 A 5000 76 0200 0600 0A00 0E00 |
!QD_A1_M3 magplcA-A1 41 6 30 A 5000 76 0200 0600 0A00 0E00 |
! |
BM_A1_C1 |
magplcA-A1 |
41 |
7 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
BM_A1_C2 |
magplcA-A1 |
41 |
8 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
BM_A1_C3 |
magplcA-A1 |
41 |
9 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
BM_A1_C4 |
magplcA-A1 |
41 |
10 |
35 |
A |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
! |
!SX_A1_M magplcA-A1 41 11 5 A 5001 F0 0200 0600 0A00 0E00 |
!SY_A1_M magplcA-A1 41 12 5 A 5001 F0 0200 0600 0A00 0E00 |
! |
!Feb.09.2017 add S[X,Y]_AS_[1,2] |
SX_AS_1 |
magplcA-A1 |
41 |
13 |
5 |
A |
5001 |
70 |
0200 |
0600 |
0A00 |
0E00 |
SY_AS_1 |
magplcA-A1 |
41 |
14 |
5 |
A |
5001 |
60 |
0200 |
0600 |
0A00 |
0E00 |
SX_AS_2 |
magplcA-A1 |
41 |
15 |
5 |
A |
5001 |
70 |
0200 |
0600 |
0A00 |
0E00 |
SY_AS_2 |
magplcA-A1 |
41 |
16 |
5 |
A |
5001 |
70 |
0200 |
0600 |
0A00 |
0E00 |
! |
!QD_A1_23 magplcA-A1 41 14 10 A 5001 FE 0200 0600 0A00 0E00 |
!QD_A1_23 magplcA-A1 41 14 6 A 5001 FE 0200 0600 0A00 0E00 |
!QD_A1_13 magplcA-A1 41 15 10 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_G1 magplcA-A1 41 16 10 A 5001 E0 0200 0600 0A00 0E00 |
! |
! |
! BM_A1_C1/2/3/4 magplcA-A1 41 7 30 A 4004 FE 0200 0600 0A00 0E00 |
! BM_A1_C1/2/3/4_POL magplcA-A1 41 8 0 A 4008 0 0200 0600 0A00 0E00 |
!! n.k. Aug.01 ch 9 50A->30A |
!!BM_A1_A magplcA-A1 41 9 50 A 4004 BE 0200 0600 0A00 0E00 |
!! sep.01 n.k. |
!!BM_A1_A magplcA-A1 41 9 30 A 4004 BE 0200 0600 0A00 0E00 |
! BM_A1_A magplcA-A1 41 9 30 A 4004 FE 0200 0600 0A00 0E00 |
!BM_A1_A_POL magplcA-A1 41 10 0 A 4008 0 0200 0600 0A00 0E00 |
!BS_A1_A magplcA-A1 41 13 5 A 4001 FE 0200 0600 0A00 0E00 |
!BS_A4_A magplcA-A1 41 14 5 A 4001 FE 0200 0600 0A00 0E00 |
! |
! [2] CONTROLLER-2 at [A-A] "A-A (3)", magplcA-A2 |
! |
! aug.3.2005, k.f, interlock change 28 -> f0/e0 |
! aug.25.2006, s.k, interlock change E0 -> F0 S[XY]_A1_G4 |
! s.k. jan.05.2007 , interlock change SXY_A1_S6 E0 -> F0 |
! t.k. sep.10.2018 remove BX_AT_22, BY_AT_22 |
! |
SX_AT_G0 |
magplcA-A2 |
42 |
1 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_G0 |
magplcA-A2 |
42 |
2 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_AT_G4 |
magplcA-A2 |
42 |
3 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_G4 |
magplcA-A2 |
42 |
4 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_AT_S6 |
magplcA-A2 |
42 |
5 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_S6 |
magplcA-A2 |
42 |
6 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
BX_AT_0 |
magplcA-A2 |
42 |
7 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
BY_AT_0 |
magplcA-A2 |
42 |
8 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
BX_A1_G |
magplcA-A2 |
42 |
9 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
BY_A1_G |
magplcA-A2 |
42 |
10 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_AT_21 |
magplcA-A2 |
42 |
11 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_21 |
magplcA-A2 |
42 |
12 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
!SX_A1_1 magplcA-A2 42 13 5 A 5001 F0 0200 0600 0A00 0E00 |
!SY_A1_1 magplcA-A2 42 14 5 A 5001 F0 0200 0600 0A00 0E00 |
!BX_AT_22 magplcA-A2 42 13 5 A 5001 F0 0200 0600 0A00 0E00 |
!BY_AT_22 magplcA-A2 42 14 5 A 5001 F0 0200 0600 0A00 0E00 |
!BX_A1_M magplcA-A2 42 15 5 A 5001 F0 0200 0600 0A00 0E00 |
!BY_A1_M magplcA-A2 42 16 5 A 5001 F0 0200 0600 0A00 0E00 |
BX_A2_A1 |
magplcA-A2 |
42 |
15 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
BY_A2_A1 |
magplcA-A2 |
42 |
16 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [3] CONTROLLER-3 at [A-A] "A-A (4)", magplcA-A3 |
! |
SX_AT_B4 |
magplcA-A3 |
43 |
1 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_B4 |
magplcA-A3 |
43 |
2 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_AT_1 |
magplcA-A3 |
43 |
3 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_1 |
magplcA-A3 |
43 |
4 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! not installed yet (oct.8.97) enabled (oct.16.1997) |
SX_AT_G1 |
magplcA-A3 |
43 |
5 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_AT_G1 |
magplcA-A3 |
43 |
6 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! k.f, mar.1998 |
! t.k. Oct.18.2013. rename QD/D_A1_2 -> QD_A1_21 |
! QF_A1_2 -> QF_A1_22 |
! s.u. Oct.18.2013. Change Max(10 -> 6) QD_A1_21 QF_A1_22 |
! t.k. Sep.15.2015. rename QF_A1_01 -> QF_A1_02 |
! QD_A1_02 -> QD_A1_01 |
! n.t Jun.02.2017. Change Max(10 -> 5) Interlock(E0 -> F0) |
! t.k Sep.20.2017. QD_A1_01 CH 13 -> 12, QF_A1_02 CH 12 -> 13 |
! |
!QD/D_A1_C5 magplcA-A3 43 11 10 A 5001 E0 0200 0600 0A00 0E00 |
QD_A1_11 |
magplcA-A3 |
43 |
7 |
10 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
QF_A1_12 |
magplcA-A3 |
43 |
8 |
10 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
QD_A1_13 |
magplcA-A3 |
43 |
9 |
10 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
!QD_A1_G1 magplcA-A3 43 10 10 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_G2 magplcA-A3 43 11 10 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_02 magplcA-A3 43 12 10 A 5001 E0 0200 0600 0A00 0E00 |
!QD_A1_01 magplcA-A3 43 13 10 A 5001 E0 0200 0600 0A00 0E00 |
QD_A1_G1 |
magplcA-A3 |
43 |
10 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QF_A1_G2 |
magplcA-A3 |
43 |
11 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_A1_01 |
magplcA-A3 |
43 |
12 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
QF_A1_02 |
magplcA-A3 |
43 |
13 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
!QD_A1_21 magplcA-A3 43 7 6 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_22 magplcA-A3 43 8 6 A 5001 E0 0200 0600 0A00 0E00 |
!QD/D_A1_B8 magplcA-A3 43 9 10 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_B8 magplcA-A3 43 10 10 A 5001 E0 0200 0600 0A00 0E00 |
!QF_A1_C5 magplcA-A3 43 12 10 A 5001 E0 0200 0600 0A00 0E00 |
! |
! n.t, Sep.11.2015 Add S[X,Y]_A1_1 |
SX_A1_1 |
magplcA-A3 |
43 |
14 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A1_1 |
magplcA-A3 |
43 |
15 |
5 |
A |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! jul.04.2013 remove BS_A1_[C1,C2,C3,C4] |
! BS_A1_C1 magplcA-A3 43 13 5 A 4001 FE 0200 0600 0A00 0E00 |
! BS_A1_C2 magplcA-A3 43 14 5 A 4001 FE 0200 0600 0A00 0E00 |
! BS_A1_C3 magplcA-A3 43 15 5 A 4001 FE 0200 0600 0A00 0E00 |
! BS_A1_C4 magplcA-A3 43 16 5 A 4001 FE 0200 0600 0A00 0E00 |
! |
! sep.27.2016 add BS_AT_J1 |
!BS_AT_J1 magplcA-A3 43 16 5 A 5001 F0 0200 0600 0A00 0E00 |
! |
! |
! [5] CONTROLLER-5 at [A-B], magplcA-B1 |
! |
! s.k, sep.04 interlock change FE -> 76 |
! t.k, sep.10.2018 remove QD/D_A2_1, QF_A2_1, QD_A2_A1 |
! |
!QD/D_A2_1 magplcA-B1 45 1 30 A 5000 76 0200 0600 0A00 0E00 |
!QF_A2_1 magplcA-B1 45 2 30 A 5000 76 0200 0600 0A00 0E00 |
!QD/D_A2_2 magplcA-B1 45 3 30 A 5000 76 0200 0600 0A00 0E00 |
!QD_A2_A1 magplcA-B1 45 3 50 A 5000 FE 0200 0600 0A00 0E00 |
!QF_A2_2 magplcA-B1 45 4 30 A 5000 76 0200 0600 0A00 0E00 |
QD/D_A2_3 |
magplcA-B1 |
45 |
5 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!QF_A2_3 magplcA-B1 45 6 30 A 5000 FE 0200 0600 0A00 0E00 |
QF_A2_3 |
magplcA-B1 |
45 |
6 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_A2_4 |
magplcA-B1 |
45 |
7 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_A2_4 |
magplcA-B1 |
45 |
8 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_A3_2 |
magplcA-B1 |
45 |
9 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_A3_2 |
magplcA-B1 |
45 |
10 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!QD/D_A3_4 magplcA-B1 45 11 50 A 5000 76 0200 0600 0A00 0E00 |
!QF_A3_4 magplcA-B1 45 12 60 A 5000 76 0200 0600 0A00 0E00 |
QD/D_A3_4 |
magplcA-B1 |
45 |
11 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_A3_4 |
magplcA-B1 |
45 |
12 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!QF_A3_4 magplcA-B1 45 12 50 A 5000 FE 0200 0600 0A00 0E00 |
! |
! [6] CONTROLLER-6 at [A-B], magplcA-B2 |
! |
SX_A2_1 |
magplcA-B2 |
46 |
1 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A2_1 |
magplcA-B2 |
46 |
2 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A2_2 |
magplcA-B2 |
46 |
3 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A2_2 |
magplcA-B2 |
46 |
4 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A2_3 |
magplcA-B2 |
46 |
5 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A2_3 |
magplcA-B2 |
46 |
6 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A2_4 |
magplcA-B2 |
46 |
7 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A2_4 |
magplcA-B2 |
46 |
8 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A3_1 |
magplcA-B2 |
46 |
9 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A3_1 |
magplcA-B2 |
46 |
10 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A3_2 |
magplcA-B2 |
46 |
11 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A3_2 |
magplcA-B2 |
46 |
12 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A3_3 |
magplcA-B2 |
46 |
13 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A3_3 |
magplcA-B2 |
46 |
14 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A3_4 |
magplcA-B2 |
46 |
15 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A3_4 |
magplcA-B2 |
46 |
16 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [7] CONTROLLER-7 at [A-C], magplcA-C1 |
! |
! s.k, sep.04 interlock change FE -> 76 |
!QD/D_A4_2 magplcA-C1 47 1 50 A 5000 76 0200 0600 0A00 0E00 |
!QF_A4_2 magplcA-C1 47 2 50 A 5000 76 0200 0600 0A00 0E00 |
!QD/D_A4_4 magplcA-C1 47 3 50 A 5000 76 0200 0600 0A00 0E00 |
!QF_A4_4 magplcA-C1 47 4 50 A 5000 76 0200 0600 0A00 0E00 |
QD/D_A4_2 |
magplcA-C1 |
47 |
1 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_A4_2 |
magplcA-C1 |
47 |
2 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_A4_4 |
magplcA-C1 |
47 |
3 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_A4_4 |
magplcA-C1 |
47 |
4 |
30 |
A |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!BM_A4_A magplcA-C1 47 5 450 A 4004 BE 0200 0600 0A00 0E00 |
!BM_A4_A_POL magplcA-C1 47 6 0 A 4008 0 0200 0600 0A00 0E00 |
! |
! [8] CONTROLLER-8 at [A-C], magplcA-C2 |
! |
SX_A4_1 |
magplcA-C2 |
48 |
1 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A4_1 |
magplcA-C2 |
48 |
2 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A4_2 |
magplcA-C2 |
48 |
3 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A4_2 |
magplcA-C2 |
48 |
4 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A4_3 |
magplcA-C2 |
48 |
5 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A4_3 |
magplcA-C2 |
48 |
6 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_A4_4 |
magplcA-C2 |
48 |
7 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_A4_4 |
magplcA-C2 |
48 |
8 |
5 |
A |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! |
! ### B SECTOR ### |
! |
! [0] CONTROLLERS |
! |
BTB-1 |
magplcB-A1 |
41 |
1 |
0 |
B |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTB-2 |
magplcB-A2 |
42 |
1 |
0 |
B |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTB-3 |
magplcB-B1 |
43 |
1 |
0 |
B |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BTB-4 |
magplcB-B2 |
44 |
1 |
0 |
B |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [1] CONTROLLER-1 at [B-A], magplcB-A1 |
! |
QD/D_B1_4 |
magplcB-A1 |
41 |
1 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B1_4 |
magplcB-A1 |
41 |
2 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_B2_4 |
magplcB-A1 |
41 |
3 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B2_4 |
magplcB-A1 |
41 |
4 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_B3_4 |
magplcB-A1 |
41 |
5 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B3_4 |
magplcB-A1 |
41 |
6 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_B4_4 |
magplcB-A1 |
41 |
7 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B4_4 |
magplcB-A1 |
41 |
8 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [2] CONTROLLER-2 at [B-A], magplcB-A2 |
! |
SX_B1_1 |
magplcB-A2 |
42 |
1 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B1_1 |
magplcB-A2 |
42 |
2 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B1_3 |
magplcB-A2 |
42 |
3 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B1_3 |
magplcB-A2 |
42 |
4 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B2_1 |
magplcB-A2 |
42 |
5 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B2_1 |
magplcB-A2 |
42 |
6 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B2_3 |
magplcB-A2 |
42 |
7 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B2_3 |
magplcB-A2 |
42 |
8 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B3_1 |
magplcB-A2 |
42 |
9 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B3_1 |
magplcB-A2 |
42 |
10 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B3_3 |
magplcB-A2 |
42 |
11 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B3_3 |
magplcB-A2 |
42 |
12 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B4_1 |
magplcB-A2 |
42 |
13 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B4_1 |
magplcB-A2 |
42 |
14 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B4_3 |
magplcB-A2 |
42 |
15 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B4_3 |
magplcB-A2 |
42 |
16 |
5 |
B |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [3] CONTROLLER-3 at [B-B], magplcB-B1 |
! |
QD/D_B5_4 |
magplcB-B1 |
43 |
1 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B5_4 |
magplcB-B1 |
43 |
2 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_B6_4 |
magplcB-B1 |
43 |
3 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B6_4 |
magplcB-B1 |
43 |
4 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_B7_4 |
magplcB-B1 |
43 |
5 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_B7_4 |
magplcB-B1 |
43 |
6 |
20 |
B |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [4] CONTROLLER-4 at [B-B], magplcB-B2 |
! |
!17.Apr.2019 change Interlock bit E0 -> F0 |
SX_B5_1 |
magplcB-B2 |
44 |
1 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B5_1 |
magplcB-B2 |
44 |
2 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B5_3 |
magplcB-B2 |
44 |
3 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B5_3 |
magplcB-B2 |
44 |
4 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B6_1 |
magplcB-B2 |
44 |
5 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B6_1 |
magplcB-B2 |
44 |
6 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B6_3 |
magplcB-B2 |
44 |
7 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B6_3 |
magplcB-B2 |
44 |
8 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B7_1 |
magplcB-B2 |
44 |
9 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B7_1 |
magplcB-B2 |
44 |
10 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B7_3 |
magplcB-B2 |
44 |
11 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B7_3 |
magplcB-B2 |
44 |
12 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B8_1 |
magplcB-B2 |
44 |
13 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B8_1 |
magplcB-B2 |
44 |
14 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_B8_3 |
magplcB-B2 |
44 |
15 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_B8_3 |
magplcB-B2 |
44 |
16 |
5 |
B |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
! ### R SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! jul.15.2021 S.Ushimoto, remove magplcR-B |
! |
BTR-1 |
magplcR-A |
41 |
1 |
0 |
9 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BTR-2 magplcR-B 42 1 0 9 6000 0000 0200 0600 0A00 0E00 |
BTR-3 |
magplcR-C |
43 |
1 |
0 |
9 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
QD_R0_01 |
magplcR-A |
41 |
1 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QF_R0_02 |
magplcR-A |
41 |
2 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QD_R0_03 |
magplcR-A |
41 |
3 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
!QF_R0_14/51 magplcR-A 41 4 60 9 5000 FE 0200 0600 0A00 0E00 |
!QD_R0_22/42 magplcR-A 41 5 60 9 5000 FE 0200 0600 0A00 0E00 |
!QF_R0_23/41 magplcR-A 41 6 60 9 5000 FE 0200 0600 0A00 0E00 |
QF_R0_14 |
magplcR-A |
41 |
4 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
! apr.2019 QD_R0_22,QF_R0_23 change interlock FE > 76 |
!QD_R0_22 magplcR-A 41 5 60 9 5000 FE 0200 0600 0A00 0E00 |
!QF_R0_23 magplcR-A 41 6 60 9 5000 FE 0200 0600 0A00 0E00 |
QD_R0_22 |
magplcR-A |
41 |
5 |
60 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_R0_23 |
magplcR-A |
41 |
6 |
60 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_R0_32 |
magplcR-A |
41 |
7 |
100 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QD_R0_61 |
magplcR-A |
41 |
8 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QF_R0_62 |
magplcR-A |
41 |
9 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
! apr.2019 QD_R0_63 change max current 60 -> 50 |
!QD_R0_63 magplcR-A 41 10 60 9 5000 FE 0200 0600 0A00 0E00 |
QD_R0_63 |
magplcR-A |
41 |
10 |
50 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
!SF_R0_13/52 magplcR-A 41 11 25 9 5000 FE 0200 0600 0A00 0E00 |
!SF_R0_21/43 magplcR-A 41 12 25 9 5000 FE 0200 0600 0A00 0E00 |
!SD_R0_31/33 magplcR-A 41 13 25 9 5000 FE 0200 0600 0A00 0E00 |
! apr.2019 SF_R0_13,SF_R0_21,SD_R0_31 change max current 25 -> 30 |
! apr.2019 SF_R0_13,SF_R0_21,SD_R0_31 change interlk FE > 76 |
!SF_R0_13 magplcR-A 41 11 25 9 5000 FE 0200 0600 0A00 0E00 |
!SF_R0_21 magplcR-A 41 12 25 9 5000 FE 0200 0600 0A00 0E00 |
!SD_R0_31 magplcR-A 41 13 25 9 5000 FE 0200 0600 0A00 0E00 |
SF_R0_13 |
magplcR-A |
41 |
11 |
30 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
SF_R0_21 |
magplcR-A |
41 |
12 |
30 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
SD_R0_31 |
magplcR-A |
41 |
13 |
30 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!BM_R0_D magplcR-A 41 14 220 9 5000 FE 0200 0600 0A00 0E00 |
! |
!BM_R0_1/6 magplcR-B 42 1 350 9 5000 FE 0200 0600 0A00 0E00 |
!BM_R0_2/3/4/5 magplcR-B 42 2 350 9 5000 FE 0200 0600 0A00 0E00 |
!BY_R0_01 magplcR-B 42 5 5 9 5001 E0 0200 0600 0A00 0E00 |
!BX_R0_01 magplcR-B 42 6 5 9 5001 E0 0200 0600 0A00 0E00 |
! |
! |
! apr.2019 change BY_R0_[23,41] Interlock E0 -> FE |
! jul.2021 remove magplcR-B |
! |
! |
!BY_R0_23 magplcR-B 42 7 5 9 5001 FE 0200 0600 0A00 0E00 |
!BY_R0_41 magplcR-B 42 8 5 9 5001 FE 0200 0600 0A00 0E00 |
!! apr.2019 remove B[X,Y]_R0_63 |
!!BX_R0_63 magplcR-B 42 9 5 9 5001 E0 0200 0600 0A00 0E00 |
!!BY_R0_63 magplcR-B 42 10 5 9 5001 E0 0200 0600 0A00 0E00 |
!BS_R0_1 magplcR-B 42 11 5 9 5001 FE 0200 0600 0A00 0E00 |
!BS_R0_2 magplcR-B 42 12 5 9 5001 FE 0200 0600 0A00 0E00 |
!BS_R0_3 magplcR-B 42 13 5 9 5001 FE 0200 0600 0A00 0E00 |
!BS_R0_4 magplcR-B 42 14 5 9 5001 FE 0200 0600 0A00 0E00 |
!BS_R0_5 magplcR-B 42 15 5 9 5001 FE 0200 0600 0A00 0E00 |
!BS_R0_6 magplcR-B 42 16 5 9 5001 FE 0200 0600 0A00 0E00 |
! |
QF_R0_41 |
magplcR-C |
43 |
1 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QD_R0_42 |
magplcR-C |
43 |
2 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
QF_R0_51 |
magplcR-C |
43 |
3 |
60 |
9 |
5000 |
FE |
0200 |
0600 |
0A00 |
0E00 |
! apr.2019 SD_R0_33,SF_R0_43,SF_R0_52 change interlock FE > 76 |
!SD_R0_33 magplcR-C 43 4 35 9 5000 FE 0200 0600 0A00 0E00 |
!SF_R0_43 magplcR-C 43 5 35 9 5000 FE 0200 0600 0A00 0E00 |
!SF_R0_52 magplcR-C 43 6 35 9 5000 FE 0200 0600 0A00 0E00 |
SD_R0_33 |
magplcR-C |
43 |
4 |
35 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
SF_R0_43 |
magplcR-C |
43 |
5 |
35 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
SF_R0_52 |
magplcR-C |
43 |
6 |
35 |
9 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
! |
! ### C SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! n.t, apr.12.2019, remove magplcC-A1,magplcC-B1 |
! |
!BTC-1 magplcC-A1 41 1 0 C 6000 0000 0200 0600 0A00 0E00 |
BTC-2 |
magplcC-A2 |
42 |
1 |
0 |
C |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BTC-3 magplcC-B1 43 1 0 C 6000 0000 0200 0600 0A00 0E00 |
BTC-4 |
magplcC-B2 |
44 |
1 |
0 |
C |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
!QD_C1_4 magplcC-A1 41 1 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C1_4 magplcC-A1 41 2 20 C 5000 76 0200 0600 0A00 0E00 |
!QD_C2_4 magplcC-A1 41 3 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C2_4 magplcC-A1 41 4 20 C 5000 76 0200 0600 0A00 0E00 |
!QD_C3_4 magplcC-A1 41 5 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C3_4 magplcC-A1 41 6 20 C 5000 76 0200 0600 0A00 0E00 |
!QD_C4_4 magplcC-A1 41 7 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C4_4 magplcC-A1 41 8 20 C 5000 76 0200 0600 0A00 0E00 |
! |
!17.Apr.2019 change Interlock bit E0 -> F0 |
SX_C1_1 |
magplcC-A2 |
42 |
1 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C1_1 |
magplcC-A2 |
42 |
2 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C1_3 |
magplcC-A2 |
42 |
3 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C1_3 |
magplcC-A2 |
42 |
4 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C2_1 |
magplcC-A2 |
42 |
5 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C2_1 |
magplcC-A2 |
42 |
6 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C2_3 |
magplcC-A2 |
42 |
7 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C2_3 |
magplcC-A2 |
42 |
8 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C3_1 |
magplcC-A2 |
42 |
9 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C3_1 |
magplcC-A2 |
42 |
10 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C3_3 |
magplcC-A2 |
42 |
11 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C3_3 |
magplcC-A2 |
42 |
12 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C4_1 |
magplcC-A2 |
42 |
13 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C4_1 |
magplcC-A2 |
42 |
14 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C4_3 |
magplcC-A2 |
42 |
15 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C4_3 |
magplcC-A2 |
42 |
16 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
!QD_C5_4 magplcC-B1 43 1 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C5_4 magplcC-B1 43 2 20 C 5000 76 0200 0600 0A00 0E00 |
!QD_C6_4 magplcC-B1 43 3 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C6_4 magplcC-B1 43 4 20 C 5000 76 0200 0600 0A00 0E00 |
!QD_C7_4 magplcC-B1 43 5 20 C 5000 76 0200 0600 0A00 0E00 |
!QF_C7_4 magplcC-B1 43 6 20 C 5000 76 0200 0600 0A00 0E00 |
! |
!17.Apr.2019 change S[X,Y]_C5_3, S[X,Y]_C6_1, SX_C6_3 Interlock bit E0 -> F0 |
BX_C5_1 |
magplcC-B2 |
44 |
1 |
5 |
C |
5001 |
FE |
0200 |
0600 |
0A00 |
0E00 |
BY_C5_1 |
magplcC-B2 |
44 |
2 |
5 |
C |
5001 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SX_C5_3 |
magplcC-B2 |
44 |
3 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C5_3 |
magplcC-B2 |
44 |
4 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C6_1 |
magplcC-B2 |
44 |
5 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C6_1 |
magplcC-B2 |
44 |
6 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C6_3 |
magplcC-B2 |
44 |
7 |
5 |
C |
5001 |
F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C6_3 |
magplcC-B2 |
44 |
8 |
5 |
C |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SX_C7_1 |
magplcC-B2 |
44 |
9 |
5 |
C |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C7_1 |
magplcC-B2 |
44 |
10 |
5 |
C |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
BX_C7_4 |
magplcC-B2 |
44 |
11 |
5 |
C |
5001 |
FE |
0200 |
0600 |
0A00 |
0E00 |
BY_C7_4 |
magplcC-B2 |
44 |
12 |
5 |
C |
5001 |
FE |
0200 |
0600 |
0A00 |
0E00 |
SX_C8_1 |
magplcC-B2 |
44 |
13 |
5 |
C |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
SY_C8_1 |
magplcC-B2 |
44 |
14 |
5 |
C |
5001 |
E0 |
0200 |
0600 |
0A00 |
0E00 |
!SX_C8_3 magplcC-B2 44 15 5 C 5001 E0 0200 0600 0A00 0E00 |
!SY_C8_3 magplcC-B2 44 16 5 C 5001 E0 0200 0600 0A00 0E00 |
! |
! ### LINAC : C SECTOR (TEMPORARY INJECTOR) ### |
! |
! [0] CONTROLLERS |
! |
!BT0-1 L3-0-2 4C 1 0 0 2000 0000 0200 0600 0A00 0E00 |
!BT0-2 L3-0-2 4D 1 0 0 2000 0000 0200 0600 0A00 0E00 |
!BT0-1 magplc0-11 41 1 0 C 6000 0000 0200 0600 0A00 0E00 |
!BT0-2 magplc0-12 42 1 0 C 6000 0000 0200 0600 0A00 0E00 |
! |
! [1] 0-A: CONTROLLER-1 ADR:41 |
! |
! k.f, may.1997, based on info oogoe-may.7 and mgv3tbl.may94 for interlock |
! k.f, mar.1998 |
! s.k, jan.2006 change interlock bit B8 -> BE in ML_CT_G |
! s.k, aug.25.2006, interlock BE -> F0 |
! interlock change BE -> 76 FC_CT_G1/2/3,FC_CT_G4/5/6,FC_CT_G7/8 |
! FC_CT_P1/2,FC_CT_B1/2,FC_CT_B3/4/5/6 |
! FC_CT_B7/8/9 |
! interlock change BE -> F0 Q[DF]_CT_B9,Q[DF]_C8_2 |
! interlock change BE -> F6 Q[DF]_C8_4 |
!ML_CT_G magplc0-11 41 1 5 C 5000 00F0 0200 0600 0A00 0E00 |
!FC_CT_G1/2/3 magplc0-11 41 2 20 C 5000 0076 0200 0600 0A00 0E00 |
!FC_CT_G4/5/6 magplc0-11 41 3 20 C 5000 0076 0200 0600 0A00 0E00 |
!FC_CT_G7/8 magplc0-11 41 4 20 C 5000 0076 0200 0600 0A00 0E00 |
!! FC_CT_G7/8 magplc0-11 41 4 35 C 5000 00BE 0200 0600 0A00 0E00 |
!FC_CT_P1/2 magplc0-11 41 5 35 C 5000 0076 0200 0600 0A00 0E00 |
!FC_CT_B1/2 magplc0-11 41 6 35 C 5000 0076 0200 0600 0A00 0E00 |
!FC_CT_B3/4/5/6 magplc0-11 41 7 35 C 5000 0076 0200 0600 0A00 0E00 |
!FC_CT_B7/8/9 magplc0-11 41 8 35 C 5000 0076 0200 0600 0A00 0E00 |
!QD_CT_B9 magplc0-11 41 9 5 C 5000 00F0 0200 0600 0A00 0E00 |
!QF_CT_B9 magplc0-11 41 10 5 C 5000 00F0 0200 0600 0A00 0E00 |
!QD_C8_2 magplc0-11 41 11 5 C 5000 00F0 0200 0600 0A00 0E00 |
!QF_C8_2 magplc0-11 41 12 5 C 5000 00F0 0200 0600 0A00 0E00 |
!QD_C8_4 magplc0-11 41 13 10 C 5000 00F6 0200 0600 0A00 0E00 |
!QF_C8_4 magplc0-11 41 14 10 C 5000 00F6 0200 0600 0A00 0E00 |
! |
! [2] 0-A: CONTROLLER-2 ADR:42 |
! |
! k.f, may.1997, based on info oogoe-may.7 and mgv3tbl.dec96 for interlock |
! s.k, aug.25.2006, interlock change 28 -> F0 S[XY]_CT_G,S[XY]_CT_G0,S[XY]_CT_G5, |
! and interlock change 28 -> F0 BM_CT_G0 |
!SX_CT_G magplc0-12 42 1 5 C 5001 00F0 0200 0600 0A00 0E00 |
!SY_CT_G magplc0-12 42 2 5 C 5001 00F0 0200 0600 0A00 0E00 |
!SX_CT_G0 magplc0-12 42 3 5 C 5001 00F0 0200 0600 0A00 0E00 |
!SY_CT_G0 magplc0-12 42 4 5 C 5001 00F0 0200 0600 0A00 0E00 |
!SX_CT_G5 magplc0-12 42 5 5 C 5001 00F0 0200 0600 0A00 0E00 |
!SY_CT_G5 magplc0-12 42 6 5 C 5001 00F0 0200 0600 0A00 0E00 |
! |
!BM_CT_G0 magplc0-12 42 7 5 C 4001 00F0 0200 0600 0A00 0E00 |
! |
! ### MAIN LINAC : 1 SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! t.k, may.27.2013, remove magplc1-B1/B2 |
! t.k, oct.06.2013, remove magplcBCS |
! n.t, jun.13.2014, reinstall magplc1-B2 |
! s.u, jul.15.2021, remove magplc1-A2 |
! |
! |
BT1-1 |
magplc1-A1 |
41 |
1 |
0 |
1 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BT1-2 magplc1-A2 42 1 0 1 6000 0000 0200 0600 0A00 0E00 |
! 20130527 !BT1-3 magplc1-B1 43 1 0 1 6000 0000 0200 0600 0A00 0E00 |
!BT1-4 magplc1-B2 44 1 0 1 6000 0000 0200 0600 0A00 0E00 |
!BT1-5 magplcBCS 45 1 0 1 6000 0000 0200 0600 0A00 0E00 |
! |
! [1] 1-A: CONTROLLER-1 ADR:41 |
! |
! m.s, sep27.2013, remove QD[F]_14_4 |
QD_11_4 |
magplc1-A1 |
41 |
1 |
12 |
1 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_11_4 |
magplc1-A1 |
41 |
2 |
12 |
1 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QD_12_4 |
magplc1-A1 |
41 |
3 |
12 |
1 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_12_4 |
magplc1-A1 |
41 |
4 |
12 |
1 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
! |
! aug.8.2014 change Q[DF]_13_5 max curr from 10 to 20A |
!QD_13_5 magplc1-A1 41 5 10 1 5000 00FE 0200 0600 0A00 0E00 |
!QF_13_5 magplc1-A1 41 6 10 1 5000 00FE 0200 0600 0A00 0E00 |
QD_13_5 |
magplc1-A1 |
41 |
5 |
20 |
1 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
QF_13_5 |
magplc1-A1 |
41 |
6 |
20 |
1 |
5000 |
76 |
0200 |
0600 |
0A00 |
0E00 |
!QD_14_4 magplc1-A1 41 7 10 1 5000 00FE 0200 0600 0A00 0E00 |
!QF_14_4 magplc1-A1 41 8 10 1 5000 00FE 0200 0600 0A00 0E00 |
QD_C8_4 |
magplc1-A1 |
41 |
9 |
10 |
C |
5000 |
00F6 |
0200 |
0600 |
0A00 |
0E00 |
QF_C8_4 |
magplc1-A1 |
41 |
10 |
10 |
C |
5000 |
00F6 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [2] 1-A: CONTROLLER-2 ADR:42 |
! |
! k.f, may.1997, rename |
! s.k, aug.25.2006, interlock change all 60 -> 70 |
! s.k, nov.2.2006, interlock change SY_12_1 60 -> 70 |
! s.k. jan.05.2007, interlock change 1-B 70 -> F0 |
! t.k. sep.15.2017, rename SX/Y_13_1 -> BX/Y_13_1, |
! remove SX/Y_13_3, BX/Y_16_5, BX/Y_17_4 |
! s.u. jul.15.2021, remove magplc1-A2 |
! |
!SX_11_1 magplc1-A2 42 1 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SY_11_1 magplc1-A2 42 2 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SX_11_3 magplc1-A2 42 3 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SY_11_3 magplc1-A2 42 4 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SX_12_1 magplc1-A2 42 5 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SY_12_1 magplc1-A2 42 6 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SX_12_3 magplc1-A2 42 7 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SY_12_3 magplc1-A2 42 8 5 1 5001 00F0 0200 0600 0A00 0E00 |
!BX_13_1 magplc1-A2 42 9 5 1 5001 00F0 0200 0600 0A00 0E00 |
!BY_13_1 magplc1-A2 42 10 5 1 5001 00F0 0200 0600 0A00 0E00 |
!!SX_13_3 magplc1-A2 42 11 5 1 5001 00F0 0200 0600 0A00 0E00 |
!!SY_13_3 magplc1-A2 42 12 5 1 5001 00F0 0200 0600 0A00 0E00 |
!!BX_13_5 magplc1-A2 42 13 20 1 5001 00F0 0200 0600 0A00 0E00 |
!!BY_13_5 magplc1-A2 42 14 20 1 5001 00F0 0200 0600 0A00 0E00 |
!BX_13_5 magplc1-A2 42 13 10 1 5001 00F6 0200 0600 0A00 0E00 |
!BY_13_5 magplc1-A2 42 14 10 1 5001 00F6 0200 0600 0A00 0E00 |
!!BX_16_5 magplc1-A2 42 15 5 1 5001 00F0 0200 0600 0A00 0E00 |
!!BY_16_5 magplc1-A2 42 16 5 1 5001 00F0 0200 0600 0A00 0E00 |
! |
! |
! [6] 1-A: CONTROLLER-5, PLC |
! |
! oct.01.2013 add P[X,Y]_13_5 |
!PX_13_2 magplc3-A3 47 1 10 1 5001 0014 0200 0600 0A00 0E00 |
!PX_13_5 magplc3-A3 47 2 10 1 5001 0014 0200 0600 0A00 0E00 |
!PY_13_5 magplc3-A3 47 3 10 1 5001 0014 0200 0600 0A00 0E00 |
! |
! [3] 1-B: CONTROLLER-3 ADR:43 |
! |
! t.k, may.27.2013, remove plc |
! |
! 20130527 !QD_15_4 magplc1-B1 43 1 12 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_15_4 magplc1-B1 43 2 12 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_16_4 magplc1-B1 43 3 12 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_16_4 magplc1-B1 43 4 12 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_17_4 magplc1-B1 43 5 10 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_17_4 magplc1-B1 43 6 10 1 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_17_C4/5 magplc1-B1 43 7 20 1 5000 0076 0200 0600 0A00 0E00 |
! 20130527 !QF_17_C4/5 magplc1-B1 43 8 20 1 5000 0076 0200 0600 0A00 0E00 |
! |
! [4] 1-B: CONTROLLER-4 ADR:44 |
! |
! k.f, may.1997, rename |
! s.k, aug.25.2006, interlock change all 60 -> 70 |
! s.k. jan.05.2007, interlock change 1-B 70 -> F0 |
! s.k. sep.05.2007, rename B[XY]_17_4 -> BX_17_41, BX_17_42 |
! SY_17_3 -> BY_17_C1 |
! t.k, may.27.2013, remove plc |
! n.t, jun.13.2014, reinstall plc |
! t.k, sep.15.2017, remove BX/Y_17_4, add PX/Y_17_4 |
! |
!BX_17_4 magplc1-B2 44 1 5 1 5001 00E0 0200 0600 0A00 0E00 |
!BY_17_4 magplc1-B2 44 2 5 1 5001 00E0 0200 0600 0A00 0E00 |
! |
!!!!!! |
! Pulse Steering |
! |
!PX_17_4 magplc4-A3 45 1 20 3 5001 0014 0200 0600 0A00 0E00 |
!PY_17_4 magplc4-A3 45 2 10 3 5001 0014 0200 0600 0A00 0E00 |
!!!!!! |
! |
! n.t, jun.16.2014,add SM_17_[01,02,03,04,05].Temporary magnet to suppress the multipactor |
! |
!SM_17_01 magplc1-B2 44 12 5 1 5001 00E0 0200 0600 0A00 0E00 |
!SM_17_02 magplc1-B2 44 13 5 1 5001 00E0 0200 0600 0A00 0E00 |
!SM_17_03 magplc1-B2 44 14 5 1 5001 00E0 0200 0600 0A00 0E00 |
!SM_17_04 magplc1-B2 44 15 5 1 5001 00E0 0200 0600 0A00 0E00 |
!SM_17_05 magplc1-B2 44 16 5 1 5001 00E0 0200 0600 0A00 0E00 |
! |
! 20130527 !BX_14_4 magplc1-B2 44 1 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !BY_14_4 magplc1-B2 44 2 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SX_15_3 magplc1-B2 44 3 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SY_15_3 magplc1-B2 44 4 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SX_16_1 magplc1-B2 44 5 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SY_16_1 magplc1-B2 44 6 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SX_16_3 magplc1-B2 44 7 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SY_16_3 magplc1-B2 44 8 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SX_17_1 magplc1-B2 44 9 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SY_17_1 magplc1-B2 44 10 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !SX_17_3 magplc1-B2 44 11 5 1 5001 00F0 0200 0600 0A00 0E00 |
!SY_17_3 magplc1-B2 44 12 5 1 5001 00F0 0200 0600 0A00 0E00 |
!BX_17_4 magplc1-B2 44 13 5 1 5001 00F0 0200 0600 0A00 0E00 |
!BY_17_4 magplc1-B2 44 14 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !BY_17_C1 magplc1-B2 44 12 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !BX_17_41 magplc1-B2 44 13 5 1 5001 00F0 0200 0600 0A00 0E00 |
! 20130527 !BX_17_42 magplc1-B2 44 14 5 1 5001 00F0 0200 0600 0A00 0E00 |
! |
! [5] CONTROLLER-5 ADR:45 (500MeV Analyzer) remove sept.1995 |
! |
! [5] 1-BCS: CONTROLLER-5, PLC ADR:45 |
! |
! k.f, may.1997 |
! n.k. sep.01 remove |
! k.f, aug.2004 reenable |
! BM_17_C1/2/3/4 magplcBCS 45 1 450 1 4004 00BE 0200 0600 0A00 0E00 |
! BM_17_C1/2/3/4_POL magplcBCS 45 2 0 1 4008 0000 0200 0600 0A00 0E00 |
! BS_17_C1 magplcBCS 45 9 5 1 4001 00FE 0200 0600 0A00 0E00 |
! BS_17_C2 magplcBCS 45 10 5 1 4001 00FE 0200 0600 0A00 0E00 |
! BS_17_C3 magplcBCS 45 11 5 1 4001 00FE 0200 0600 0A00 0E00 |
! BS_17_C4 magplcBCS 45 12 5 1 4001 00FE 0200 0600 0A00 0E00 |
! |
! k.f, jun.1998 |
!BX_17_C5 magplcBCS 45 13 20 1 5001 0060 0200 0600 0A00 0E00 |
!BY_17_C5 magplcBCS 45 14 20 1 5001 0060 0200 0600 0A00 0E00 |
! |
! ### MAIN LINAC : 2 SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! [2-A] BT2-1 to BT2-5 |
! |
! t.k, may.27.2013, remove magplc2-A1/A2/A3/A5 |
! s.u, jul.15.2021, remove magplc2-A5 |
! |
BT2-1 |
magplc2-A1 |
41 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BT2-2 magplc2-A2 42 1 0 2 6000 0000 0200 0600 0A00 0E00 |
BT2-3 |
magplc2-A3 |
43 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BT2-4 magplc2-A4 44 1 0 2 6000 0000 0200 0600 0A00 0E00 |
!BT2-5 magplc2-A5 45 1 0 2 6000 0000 0200 0600 0A00 0E00 |
BT2-8 |
magplc2-A6 |
46 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BT2-9 |
magplc3-A3 |
47 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [2-B] BT2-6(PLC), BT2-7(PLC) |
! s.u, jul.15.2021, remove magplc2-B2 |
! |
! |
BT2-6 |
magplc2-B1 |
41 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BT2-7 magplc2-B2 43 1 0 2 6000 0000 0200 0600 0A00 0E00 |
! |
BT2-10 |
magplc2-A7 |
48 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BT2-11 |
magplc2-B3 |
49 |
1 |
0 |
2 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [1] 2-A: CONTROLLER-1, PLC |
! |
! t.k, may.27.2013, remove plc |
! |
! 20130527 !FP_21_T magplc2-A1 41 14 20000 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! rename on 25.sep.00 by n.k. |
!FC_21_11/34 magplc2-A1 41 15 650 2 5000 00FE 0200 0600 0A00 0E00 |
!FC_21_21/44 magplc2-A1 41 16 650 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! remove feb.21.2013 FC_21_T,11/23,31/44 |
!FC_21_11/23 magplc2-A1 41 15 650 2 5000 00FE 0200 0600 0A00 0E00 |
!FC_21_31/44 magplc2-A1 41 16 650 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! apr.1.2014 rename SO_15_11,SO_16_21 -> FC_15_11,FC_16_21 |
!SO_15_11 magplc2-A1 41 15 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SO_16_21 magplc2-A1 41 16 650 1 5000 00FE 0200 0600 0A00 0E00 |
! |
!FC_21_T/35 magplc2-A1 41 1 750 2 5000 00FE 0200 0600 0A00 0E00 |
!FC_21_T magplc2-A1 41 1 750 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! |
! |
! may.07.2014. add FC_15_T,SX_15_T,SY_15_T by kudou |
! jun.19.2014. remove SX_15_T,SY_15_T by kudou |
! Sep.24.2014. add SL_16_11, rename SL_16_21 to SL_16_31 by s.u |
! Apr.12.2015. add SL_16_33,rename SL_16_31 to SL_16_22 |
! Mar.29.2016. rename SL_16_11 -> SL_15_T/11, SL_15_11 -> SL_16_11, SL_15_T -> SL_13_TS |
! Jan.04.2018. SL_15_T/11 -> SL_15_11, SL_15_T |
! |
!SL_15_T magplc2-A1 41 1 750 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_13_TS magplc2-A1 41 1 750 1 5000 00FE 0200 0600 0A00 0E00 |
!SX_15_T magplc2-A1 41 5 20 1 5001 0060 0200 0600 0A00 0E00 |
!SY_15_T magplc2-A1 41 6 20 1 5001 0060 0200 0600 0A00 0E00 |
!!SL_15_11 magplc2-A1 41 15 650 1 5000 00FE 0200 0600 0A00 0E00 |
! Mar.29.2016. rename SL_15_11 -> SL_16_11 |
!SL_15_11 magplc2-A1 41 14 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_16_11 magplc2-A1 41 14 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_16_21 magplc2-A1 41 16 650 1 5000 00FE 0200 0600 0A00 0E00 |
! Mar.29.2016. rename SL_16_11 -> SL_15_T/11 |
!SL_16_11 magplc2-A1 41 2 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_15_11 magplc2-A1 41 2 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_15_T magplc2-A1 41 3 850 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_16_31 magplc2-A1 41 16 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_16_22 magplc2-A1 41 15 650 1 5000 00FE 0200 0600 0A00 0E00 |
!SL_16_33 magplc2-A1 41 16 650 1 5000 00FE 0200 0600 0A00 0E00 |
! |
! interlock change QD/D_21_45-QF_21_K5 BE -> F0 |
! 20130527 !QD/D_21_45 magplc2-A1 41 2 5 2 5000 00F0 0200 0600 0A00 0E00 |
! 20130527 !QF_21_45 magplc2-A1 41 3 5 2 5000 00F0 0200 0600 0A00 0E00 |
!BM_21_K1/4 magplc2-A1 41 4 5 2 5000 0078 0200 0600 0A00 0E00 |
!BM_21_K2/3 magplc2-A1 41 5 5 2 5000 007E 0200 0600 0A00 0E00 |
!BM_21_K1/4 magplc2-A1 41 4 5 2 5000 00B8 0200 0600 0A00 0E00 |
!BM_21_K1/4 magplc2-A1 41 4 5 2 5000 00BE 0200 0600 0A00 0E00 |
!BM_21_K2/3 magplc2-A1 41 5 5 2 5000 00BE 0200 0600 0A00 0E00 |
! k.f, sep.2001. |
!QD/D_21_K5 magplc2-A1 41 6 25 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_21_K5 magplc2-A1 41 7 25 2 5000 00BE 0200 0600 0A00 0E00 |
!QD/D_21_K5 magplc2-A1 41 6 10 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_21_K5 magplc2-A1 41 7 10 2 5000 00BE 0200 0600 0A00 0E00 |
! n.k. jan.2002 |
! 20130527 !QD/D_21_K5 magplc2-A1 41 6 5 2 5000 00F0 0200 0600 0A00 0E00 |
! 20130527 !QF_21_K5 magplc2-A1 41 7 5 2 5000 00F0 0200 0600 0A00 0E00 |
! m.s, 13aug2002. |
!QD_22_11 magplc2-A1 41 8 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF/D/F_22_12 magplc2-A1 41 9 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QD_22_15 magplc2-A1 41 10 35 2 5000 00BE 0200 0600 0A00 0E00 |
! 20130527 !QD_22_11 magplc2-A1 41 8 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF/D/F_22_12 magplc2-A1 41 9 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_22_15 magplc2-A1 41 10 35 2 5000 00FE 0200 0600 0A00 0E00 |
! n.t Aug.13.2008 interlock BE -> 76 |
!QF/D_22_21/2 magplc2-A1 41 11 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF/D_22_23/4 magplc2-A1 41 12 35 2 5000 00BE 0200 0600 0A00 0E00 |
! 20130527 !QF/D_22_21/2 magplc2-A1 41 11 35 2 5000 0076 0200 0600 0A00 0E00 |
! 20130527 !QF/D_22_23/4 magplc2-A1 41 12 35 2 5000 0076 0200 0600 0A00 0E00 |
! n.k. Aug.01 ch 13 33A->30A |
!QF_22_25 magplc2-A1 41 13 33 2 5000 00FE 0200 0600 0A00 0E00 |
! m.s, 13aug2002. 30A->35A |
!QF_22_25 magplc2-A1 41 13 30 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_22_25 magplc2-A1 41 13 35 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! [2] 2-A: CONTROLLER-2, PLC, ADR:42 |
! |
! n.k. Aug.01 ch 2,4,5,7,9 33A->30A |
! t.k, may.27.2013, remove plc |
! |
!QD/F/D_22_31 magplc2-A2 42 1 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_22_34 magplc2-A2 42 2 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QD/F/D_22_41 magplc2-A2 42 3 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_22_44 magplc2-A2 42 4 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QD_23_11 magplc2-A2 42 5 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QF/D_23_12/3 magplc2-A2 42 6 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_23_14 magplc2-A2 42 7 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QD/F/D_23_21 magplc2-A2 42 8 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QF_23_24 magplc2-A2 42 9 30 2 5000 00FE 0200 0600 0A00 0E00 |
! m.s, 13aug2002. A ->35A and INTERLOCL->FE |
! 20130527 !QD/F/D_22_31 magplc2-A2 42 1 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_22_34 magplc2-A2 42 2 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD/F/D_22_41 magplc2-A2 42 3 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_22_44 magplc2-A2 42 4 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_23_11 magplc2-A2 42 5 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF/D_23_12/3 magplc2-A2 42 6 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_23_14 magplc2-A2 42 7 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD/F/D_23_21 magplc2-A2 42 8 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_23_24 magplc2-A2 42 9 35 2 5000 00FE 0200 0600 0A00 0E00 |
! |
!QD_18_4 magplc2-A2 42 1 20 1 5000 0076 0200 0600 0A00 0E00 |
!QF_18_4 magplc2-A2 42 2 20 1 5000 0076 0200 0600 0A00 0E00 |
! |
! apr.10.2014 remove Q[DF]_21_4,QD_22_43,QF_22_44 |
! |
!QD_21_4 magplc2-A2 42 3 20 1 5000 0076 0200 0600 0A00 0E00 |
!QF_21_4 magplc2-A2 42 4 20 1 5000 0076 0200 0600 0A00 0E00 |
!QD_22_43 magplc2-A2 42 5 35 1 5000 00FE 0200 0600 0A00 0E00 |
!QF_22_44 magplc2-A2 42 6 35 1 5000 0076 0200 0600 0A00 0E00 |
! |
! |
! [3] 2-A: CONTROLLER-3, PLC, ADR:43 |
! |
! n.k. Aug.01 ch 2,3,4 33A->30A |
! t.k, may.27.2013, remove plc |
! k.f, apr.24.2014. change channel number of q[df]_23_4[12] |
! |
!QD/F_23_31/2 magplc2-A3 43 1 35 2 5000 00BE 0200 0600 0A00 0E00 |
!QD_23_33 magplc2-A3 43 2 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QF_23_41 magplc2-A3 43 3 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QD_23_42 magplc2-A3 43 4 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QF_23_41 magplc2-A3 43 5 30 2 5000 00FE 0200 0600 0A00 0E00 |
!QD_23_42 magplc2-A3 43 6 30 2 5000 00FE 0200 0600 0A00 0E00 |
! m.s, 13aug2002. 30A ->35A and INTERLOCL->FE |
! 20130527 !QD/F_23_31/2 magplc2-A3 43 1 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_23_33 magplc2-A3 43 2 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QF_23_41 magplc2-A3 43 3 35 2 5000 00FE 0200 0600 0A00 0E00 |
! 20130527 !QD_23_42 magplc2-A3 43 4 35 2 5000 00FE 0200 0600 0A00 0E00 |
! |
! s.k, 26aug2005 interlock 76 -> 70 |
! m.s, sep.27.2013, add plc QD/D_24_1, ..., QF_24_4 |
! k.f, apr.25.2014, change interlock from 70 -> 76 |
! s.k, may.30.2014, change interlock from 76 -> 70 in QD/D_23_43 |
! n,t, aug.29.2014, separate QD/D_23_43 into QD_23_43,QD_23_45 and rename QF_23_43 to QF_23_44 |
! n.t, oct.01.2014, change interlock from 70 -> 76 in QD_23_43,QD_23_45 |
! |
!QD/D_23_43 magplc2-A3 43 5 20 2 5000 0070 0200 0600 0A00 0E00 |
!QD_23_43 magplc2-A3 43 4 20 2 5000 0076 0200 0600 0A00 0E00 |
!QF_23_43 magplc2-A3 43 6 20 2 5000 0076 0200 0600 0A00 0E00 |
QD_23_43 |
magplc2-A3 |
43 |
6 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_23_45 |
magplc2-A3 |
43 |
5 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_24_1 |
magplc2-A3 |
43 |
7 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_24_1 |
magplc2-A3 |
43 |
8 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_24_2 |
magplc2-A3 |
43 |
9 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_24_2 |
magplc2-A3 |
43 |
10 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_24_3 |
magplc2-A3 |
43 |
11 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_24_3 |
magplc2-A3 |
43 |
12 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_24_4 |
magplc2-A3 |
43 |
13 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_24_4 |
magplc2-A3 |
43 |
14 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [6] 2-A: CONTROLLER-5, PLC |
! |
! oct.01.2013 add P[X,Y]_18_4 |
!PX_17_C1 magplc2-A6 46 1 20 2 5001 0014 0200 0600 0A00 0E00 |
!PX_17_C5 magplc2-A6 46 2 20 2 5001 0014 0200 0600 0A00 0E00 |
!PY_18_4 magplc2-A6 46 1 10 1 5001 0014 0200 0600 0A00 0E00 |
!PX_18_4 magplc2-A6 46 2 10 1 5001 0014 0200 0600 0A00 0E00 |
! |
! [4] 2-A: CONTROLLER-4, PLC |
! |
!remove feb.21.2013 #21 ACC removed |
!SX_21_1 magplc2-A4 44 1 5 2 5001 0028 0200 0600 0A00 0E00 |
!SY_21_1 magplc2-A4 44 2 5 2 5001 0028 0200 0600 0A00 0E00 |
!SX_21_2 magplc2-A4 44 3 5 2 5001 0028 0200 0600 0A00 0E00 |
!SY_21_2 magplc2-A4 44 4 5 2 5001 0028 0200 0600 0A00 0E00 |
!SX_21_31 magplc2-A4 44 5 5 2 5001 0028 0200 0600 0A00 0E00 |
!SY_21_31 magplc2-A4 44 6 5 2 5001 0028 0200 0600 0A00 0E00 |
!SX_21_41 magplc2-A4 44 7 5 2 5001 0028 0200 0600 0A00 0E00 |
!SY_21_41 magplc2-A4 44 8 5 2 5001 0028 0200 0600 0A00 0E00 |
! |
! [6] 2-A: CONTROLLER-5, PLC |
! |
! oct.01.2013 add P[X,Y]_21_4 |
!PX_21_45 magplc2-A6 46 3 20 2 5001 0014 0200 0600 0A00 0E00 |
!PY_21_45 magplc2-A6 46 4 20 2 5001 0014 0200 0600 0A00 0E00 |
!PX_21_4 magplc2-A6 46 3 10 2 5001 0014 0200 0600 0A00 0E00 |
!PY_21_4 magplc2-A6 46 4 10 2 5001 0014 0200 0600 0A00 0E00 |
! |
! |
! [5] 2-A: CONTROLLER-5, PLC |
! |
! t.k, may.27.2013, remove plc |
! m.s, sep.27.2013, add plc SX_23_11, ..., SY_24_4 (INTERLOCK: 0200 => 00F0) |
! |
! 20130527 !BX_21_K5 magplc2-A5 45 1 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BY_21_K5 magplc2-A5 45 2 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BX_22_32 magplc2-A5 45 3 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BY_22_31 magplc2-A5 45 4 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BX_23_12 magplc2-A5 45 5 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BY_23_11 magplc2-A5 45 6 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BX_23_31 magplc2-A5 45 7 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BY_23_31 magplc2-A5 45 8 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BX_23_4 magplc2-A5 45 9 5 2 5001 0028 0200 0600 0A00 0E00 |
! 20130527 !BY_23_4 magplc2-A5 45 10 5 2 5001 0028 0200 0600 0A00 0E00 |
! |
! apr.10.2014 remove SX_23_11,SY_23_12 |
! SX_23_11 magplc2-A5 45 5 5 2 5001 00F0 0200 0600 0A00 0E00 |
! SY_23_12 magplc2-A5 45 6 5 2 5001 00F0 0200 0600 0A00 0E00 |
! |
! n.t, jun.13.2014 add BX_23_12,BY_23_13 |
! n.t, aug.29.2014 add S[XY]_24_1 |
! s.u. jul.15.2021 remove magplc2-A5 |
! |
!BX_23_12 magplc2-A5 45 1 5 2 5001 00F0 0200 0600 0A00 0E00 |
!BY_23_13 magplc2-A5 45 2 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_24_1 magplc2-A5 45 9 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SY_24_1 magplc2-A5 45 10 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_24_2 magplc2-A5 45 11 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SY_24_2 magplc2-A5 45 12 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_24_3 magplc2-A5 45 13 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SY_24_3 magplc2-A5 45 14 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_24_4 magplc2-A5 45 15 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SY_24_4 magplc2-A5 45 16 5 2 5001 00F0 0200 0600 0A00 0E00 |
! |
! [10] 2-B: CONTROLLER-10, PLC |
! |
!PX_24_4 magplc2-A7 48 1 10 2 5001 0014 0200 0600 0A00 0E00 |
!PY_24_4 magplc2-A7 48 2 10 2 5001 0014 0200 0600 0A00 0E00 |
! |
! [6] 2-B: CONTROLLER-6, PLC |
! |
! 2011/09/09 t.kudou. rename Q*_26_* (connect 32 RF Gun) |
! 2012/08/02 t.kudou. rename *_32_* -> Q*_26_* |
! (disconnect GU_32 mag, connect org) |
! |
QD/D_26_1 |
magplc2-B1 |
41 |
1 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_26_1 |
magplc2-B1 |
41 |
2 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_26_2 |
magplc2-B1 |
41 |
3 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_26_2 |
magplc2-B1 |
41 |
4 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_26_3 |
magplc2-B1 |
41 |
5 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_26_3 |
magplc2-B1 |
41 |
6 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_26_4 |
magplc2-B1 |
41 |
7 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_26_4 |
magplc2-B1 |
41 |
8 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
! |
!QF_32_R1 magplc2-B1 41 1 20 3 5000 0076 0200 0600 0A00 0E00 |
!QD_32_R2 magplc2-B1 41 2 20 3 5000 0076 0200 0600 0A00 0E00 |
!QF_32_4 magplc2-B1 41 3 20 3 5000 0076 0200 0600 0A00 0E00 |
!BM_32_R1 magplc2-B1 41 4 20 3 5000 0076 0200 0600 0A00 0E00 |
!BM_32_R2 magplc2-B1 41 5 20 3 5000 0076 0200 0600 0A00 0E00 |
!BM_32_R3 magplc2-B1 41 6 20 3 5000 0076 0200 0600 0A00 0E00 |
!BM_32_R4 magplc2-B1 41 7 20 3 5000 0076 0200 0600 0A00 0E00 |
!BM_32_4 magplc2-B1 41 8 20 3 5000 0076 0200 0600 0A00 0E00 |
! |
QD/D_27_2 |
magplc2-B1 |
41 |
9 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_27_2 |
magplc2-B1 |
41 |
10 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_27_4 |
magplc2-B1 |
41 |
11 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_27_4 |
magplc2-B1 |
41 |
12 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_28_2 |
magplc2-B1 |
41 |
13 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_28_2 |
magplc2-B1 |
41 |
14 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
!QD/D_28_4 magplc2-B1 41 15 20 2 5000 0076 0200 0600 0A00 0E00 |
QD_28_4 |
magplc2-B1 |
41 |
15 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QF_28_4 |
magplc2-B1 |
41 |
16 |
20 |
2 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [7] 2-B: CONTROLLER-7, PLC |
! |
! 2011/09/09 t.kudou. rename SX/Y_26_1, SX_26_2 (connect 32 RF Gun) |
! 2012/08/02 t.kudou. rename *_32_* -> *_26_* |
! (disconnect GU_32 mag, connect org) |
! 2017/06/01 Interlock 0060 -> 00F0 |
! 2021/07/15 s.Ushimoto remove magplc2-B2 |
! |
!!SX_26_1 magplc2-B2 43 1 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_26_1 magplc2-B2 43 2 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_26_2 magplc2-B2 43 3 5 2 5001 0060 0200 0600 0A00 0E00 |
!! |
!!SX_32_R2 magplc2-B2 43 1 5 3 5001 0060 0200 0600 0A00 0E00 |
!!SY_32_R2 magplc2-B2 43 2 5 3 5001 0060 0200 0600 0A00 0E00 |
!!SY_32_R1 magplc2-B2 43 3 5 3 5001 0060 0200 0600 0A00 0E00 |
!! |
!!SY_26_2 magplc2-B2 43 4 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_26_3 magplc2-B2 43 5 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_26_3 magplc2-B2 43 6 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_26_4 magplc2-B2 43 7 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_26_4 magplc2-B2 43 8 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_27_1 magplc2-B2 43 9 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_27_1 magplc2-B2 43 10 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_27_3 magplc2-B2 43 11 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_27_3 magplc2-B2 43 12 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_28_1 magplc2-B2 43 13 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_28_1 magplc2-B2 43 14 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SX_28_3 magplc2-B2 43 15 5 2 5001 0060 0200 0600 0A00 0E00 |
!!SY_28_3 magplc2-B2 43 16 5 2 5001 0060 0200 0600 0A00 0E00 |
!SX_26_1 magplc2-B2 43 1 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SY_26_1 magplc2-B2 43 2 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_26_2 magplc2-B2 43 3 5 2 5001 00F0 0200 0600 0A00 0E00 |
!! |
!!SX_32_R2 magplc2-B2 43 1 5 3 5001 0060 0200 0600 0A00 0E00 |
!!SY_32_R2 magplc2-B2 43 2 5 3 5001 0060 0200 0600 0A00 0E00 |
!!SY_32_R1 magplc2-B2 43 3 5 3 5001 0060 0200 0600 0A00 0E00 |
!! |
!! 20.Sep.2017 ch5-16 change Interlock bit F0 to E0 |
!SY_26_2 magplc2-B2 43 4 5 2 5001 00F0 0200 0600 0A00 0E00 |
!SX_26_3 magplc2-B2 43 5 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_26_3 magplc2-B2 43 6 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SX_26_4 magplc2-B2 43 7 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_26_4 magplc2-B2 43 8 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SX_27_1 magplc2-B2 43 9 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_27_1 magplc2-B2 43 10 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SX_27_3 magplc2-B2 43 11 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_27_3 magplc2-B2 43 12 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SX_28_1 magplc2-B2 43 13 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_28_1 magplc2-B2 43 14 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SX_28_3 magplc2-B2 43 15 5 2 5001 00E0 0200 0600 0A00 0E00 |
!SY_28_3 magplc2-B2 43 16 5 2 5001 00E0 0200 0600 0A00 0E00 |
! |
! [6] 2-A: CONTROLLER-5, PLC |
! |
!PX_28_4 magplc3-A3 47 1 20 2 5001 0014 0200 0600 0A00 0E00 |
!PY_28_4 magplc3-A3 47 2 20 2 5001 0014 0200 0600 0A00 0E00 |
! |
! [8] 2-X: CONTROLLER-8 - actually by BT3-1 |
! |
! k.f, mar.1998 |
! s.k, sep.05.2007 remove BM_28_A, BS_28_A |
!BM_28_A magplc3-A1 41 15 380 2 4000 00FE 0200 0600 0A00 0E00 |
! BS_28_A magplc3-A1 41 16 5 2 4001 0028 0600 0200 0200 0600 |
!BS_28_A magplc3-A1 41 16 5 2 4001 0028 0200 0600 0A00 0E00 |
! |
! |
!BX_30_1 magplc2-B3 49 1 5 3 4001 00F0 0200 0600 0A00 0E00 |
!BY_30_1 magplc2-B3 49 2 5 3 4001 00F0 0200 0600 0A00 0E00 |
!BS_DC_1 magplc2-B3 49 3 5 2 4001 00F0 0200 0600 0A00 0E00 |
!BS_DC_4 magplc2-B3 49 4 5 2 4001 00F0 0200 0600 0A00 0E00 |
! |
! ### MAIN LINAC : 3 SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! BT3-1 magplc3-A1 41 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-2 magplc3-B1 42 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-3 magplc3-A2 43 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-4 L3-3-5 4C 1 0 3 2000 0000 0200 0600 0A00 0E00 |
! BT3-4 magplc3-B2 44 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-5 magplc4-A3 45 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-6 magplc3-T1 46 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! BT3-7 magplc3-T2 47 1 0 3 6000 0000 0200 0600 0A00 0E00 |
! |
! [5] 3-T: CONTROLLER-5, PLC |
! |
! |
! k.f, may.1997, based on info oogoe-may.7 and mgv3tbl.may94 for interlock |
! |
!ML_3T_G magplc3-T1 46 1 5 3 5000 00F0 0200 0600 0A00 0E00 |
!SL_3T_G1/2/3 magplc3-T1 46 2 20 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_G4/5/6 magplc3-T1 46 3 20 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_G7/8 magplc3-T1 46 4 20 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_P1/2 magplc3-T1 46 5 35 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_B1/2 magplc3-T1 46 6 35 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_B3/4/5/6 magplc3-T1 46 7 35 3 5000 0076 0200 0600 0A00 0E00 |
!SL_3T_B7/8/9 magplc3-T1 46 8 35 3 5000 0076 0200 0600 0A00 0E00 |
!QD_32_3 magplc3-T1 46 11 5 3 5000 00F0 0200 0600 0A00 0E00 |
!QF_32_3 magplc3-T1 46 12 5 3 5000 00F0 0200 0600 0A00 0E00 |
! |
! [1] 3-A: CONTROLLER-1, PLC |
! |
!QD_31_0 magplc3-A1 41 9 20 3 5000 0076 0200 0600 0A00 0E00 |
!QF_31_0 magplc3-A1 41 10 20 3 5000 0076 0200 0600 0A00 0E00 |
! |
!QD_31_4 magplc3-A1 41 1 20 3 5000 0076 0200 0600 0A00 0E00 |
!QF_31_4 magplc3-A1 41 2 20 3 5000 0076 0200 0600 0A00 0E00 |
! QD_30_1 magplc3-A1 41 1 20 3 5000 0076 0200 0600 0A00 0E00 |
! QF_30_1 magplc3-A1 41 2 20 3 5000 0076 0200 0600 0A00 0E00 |
! |
! n.t, dec.28.2011 rename QD_32_4,QF_32_4 to QD_33_2,QF_33_2 |
!QD_32_4 magplc3-A1 41 3 20 3 5000 0076 0200 0600 0A00 0E00 |
!QF_32_4 magplc3-A1 41 4 20 3 5000 0076 0200 0600 0A00 0E00 |
! QD_33_2 magplc3-A1 41 3 20 3 5000 0076 0200 0600 0A00 0E00 |
! QF_33_2 magplc3-A1 41 4 20 3 5000 0076 0200 0600 0A00 0E00 |
! QD_33_4 magplc3-A1 41 5 20 3 5000 0076 0200 0600 0A00 0E00 |
! QF_33_4 magplc3-A1 41 6 20 3 5000 0076 0200 0600 0A00 0E00 |
! QD_34_4 magplc3-A1 41 7 20 3 5000 0076 0200 0600 0A00 0E00 |
! QF_34_4 magplc3-A1 41 8 20 3 5000 0076 0200 0600 0A00 0E00 |
! |
! [2] 3-A: CONTROLLER-2, PLC |
! |
! s.k, sep.04.2007 change interlock QD/D_36_4-QF_38_4 FE -> 76 |
! max 50/60 -> |
! s.u, mar.29.2017 chnage max current QD_36_4/QF_36_4 30 -> 35 |
! |
!QD/D_36_4 magplc3-B1 42 1 30 3 5000 0076 0200 0600 0A00 0E00 |
!QD_36_4 magplc3-B1 42 1 30 3 5000 0076 0200 0600 0A00 0E00 |
!QF_36_4 magplc3-B1 42 2 30 3 5000 0076 0200 0600 0A00 0E00 |
! QD_36_4 magplc3-B1 42 1 35 3 5000 0076 0200 0600 0A00 0E00 |
! QF_36_4 magplc3-B1 42 2 35 3 5000 0076 0200 0600 0A00 0E00 |
!QD/D_38_4 magplc3-B1 42 3 30 3 5000 0076 0200 0600 0A00 0E00 |
! QD_38_4 magplc3-B1 42 3 30 3 5000 0076 0200 0600 0A00 0E00 |
! QF_38_4 magplc3-B1 42 4 30 3 5000 0076 0200 0600 0A00 0E00 |
! k.f, may.1997, rename, and later restored to the original |
! |
! [6] 3-T: CONTROLLER-6, PLC |
! |
!SX_3T_G magplc3-T2 47 1 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_3T_G magplc3-T2 47 2 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_3T_G0 magplc3-T2 47 3 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_3T_G0 magplc3-T2 47 4 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_3T_G5 magplc3-T2 47 5 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_3T_G5 magplc3-T2 47 6 5 3 5001 00F0 0200 0600 0A00 0E00 |
! |
! [3] 3-A: CONTROLLER-3, PLC |
! |
! sep.01. n.k. |
! sep.09 remove S[XY]_31_[13] |
! |
!BX_28_4 magplc3-A2 43 1 5 3 5001 0060 0200 0600 0A00 0E00 |
!BY_28_4 magplc3-A2 43 2 5 3 5001 0060 0200 0600 0A00 0E00 |
!S[XY]_3 interlock 0060 -> 00F0 |
!SX_31_1 magplc3-A2 43 1 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_31_1 magplc3-A2 43 2 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_31_3 magplc3-A2 43 3 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_31_3 magplc3-A2 43 4 5 3 5001 00F0 0200 0600 0A00 0E00 |
! |
! n.t sep.2012 gu_32 magnet move magplc2-B2 to magplc3-A2 |
! t.k sep.2016 remove SY_32_R1, SX_32_R2, SY_32_R2 |
! t.k sep.2018 remove S[X,Y]_[32,33,34]_[1,3] |
! |
!SY_32_R1 magplc3-A2 43 1 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_32_R2 magplc3-A2 43 2 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_32_R2 magplc3-A2 43 3 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_32_1 magplc3-A2 43 5 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_32_1 magplc3-A2 43 6 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_32_3 magplc3-A2 43 7 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_32_3 magplc3-A2 43 8 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_33_1 magplc3-A2 43 9 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_33_1 magplc3-A2 43 10 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_33_3 magplc3-A2 43 11 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_33_3 magplc3-A2 43 12 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_34_1 magplc3-A2 43 13 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_34_1 magplc3-A2 43 14 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_34_3 magplc3-A2 43 15 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_34_3 magplc3-A2 43 16 5 3 5001 00F0 0200 0600 0A00 0E00 |
! |
! [4] 3-B: CONTROLLER-4, PLC |
! |
!S[XY]_3 interlock 0028 -> 00F0 |
! t.k sep.2018 remove S[X,Y]_[35,37]_[1,3] |
! |
!SX_35_1 magplc3-B2 44 1 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_35_1 magplc3-B2 44 2 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_35_3 magplc3-B2 44 3 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_35_3 magplc3-B2 44 4 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_37_1 magplc3-B2 44 5 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_37_1 magplc3-B2 44 6 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SX_37_3 magplc3-B2 44 7 5 3 5001 00F0 0200 0600 0A00 0E00 |
!SY_37_3 magplc3-B2 44 8 5 3 5001 00F0 0200 0600 0A00 0E00 |
! |
! [6] 3-T: CONTROLLER-6, PLC |
! |
!BM_3T_G0 magplc3-T2 47 7 5 3 4001 00F0 0200 0600 0A00 0E00 |
! |
! Pulse Steering |
! |
!PX_38_4 magplc4-A3 45 1 20 3 5001 0014 0200 0600 0A00 0E00 |
!PY_38_4 magplc4-A3 45 2 10 3 5001 0014 0200 0600 0A00 0E00 |
! ### MAIN LINAC : 4 SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! BT4-1 magplc4-A 41 1 0 4 6000 0000 0200 0600 0A00 0E00 |
! BT4-2 magplc4-B1 42 1 0 4 6000 0000 0200 0600 0A00 0E00 |
! BT4-3 magplc4-B2 43 1 0 4 6000 0000 0200 0600 0A00 0E00 |
! BT4-4 magplc5-A3 44 1 0 4 6000 0000 0200 0600 0A00 0E00 |
! |
! [1] CONTROLLER-1 ADR:41 |
! |
! s.k, sep.04.2007, change interlock QD/D_42_4-QF_48_4 FE -> 76 |
! max 60 -> 30 |
!QD/D_42_4 magplc4-A 41 1 30 4 5000 0076 0200 0600 0A00 0E00 |
! QD_42_4 magplc4-A 41 1 30 4 5000 0076 0200 0600 0A00 0E00 |
! QF_42_4 magplc4-A 41 2 30 4 5000 0076 0200 0600 0A00 0E00 |
!QD/D_44_4 magplc4-A 41 3 30 4 5000 0076 0200 0600 0A00 0E00 |
! QD_44_4 magplc4-A 41 3 30 4 5000 0076 0200 0600 0A00 0E00 |
! QF_44_4 magplc4-A 41 4 30 4 5000 0076 0200 0600 0A00 0E00 |
!QD_44_1 magplc4-A 41 5 60 4 5000 0076 0200 0600 0A00 0E00 |
!QF_44_3 magplc4-A 41 6 60 4 5000 0076 0200 0600 0A00 0E00 |
! |
! [2] CONTROLLER-2 ADR:42 |
! |
!QD/D_46_4 magplc4-B1 42 1 30 4 5000 0076 0200 0600 0A00 0E00 |
! QD_46_4 magplc4-B1 42 1 30 4 5000 0076 0200 0600 0A00 0E00 |
! QF_46_4 magplc4-B1 42 2 30 4 5000 0076 0200 0600 0A00 0E00 |
!QD/D_48_4 magplc4-B1 42 3 30 4 5000 0076 0200 0600 0A00 0E00 |
! QD_48_4 magplc4-B1 42 3 30 4 5000 0076 0200 0600 0A00 0E00 |
! QF_48_4 magplc4-B1 42 4 30 4 5000 0076 0200 0600 0A00 0E00 |
! |
! [3] CONTROLLER-3 ADR:43 |
! |
! aug.26.2005, s.k, interlock change 60 -> f0 |
! jan.19.2017, t.k, rename B[XY]_38_4 -> S[XY]_41_1 |
! t.k sep.2018 remove S[X,Y]_[41,43,45,47]_[1,3] |
! |
!BX_38_4 magplc4-B2 43 1 5 4 5001 00F0 0200 0600 0A00 0E00 |
!BY_38_4 magplc4-B2 43 2 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_41_1 magplc4-B2 43 1 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_41_1 magplc4-B2 43 2 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_41_3 magplc4-B2 43 3 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_41_3 magplc4-B2 43 4 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_43_1 magplc4-B2 43 5 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_43_1 magplc4-B2 43 6 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_43_3 magplc4-B2 43 7 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_43_3 magplc4-B2 43 8 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_45_1 magplc4-B2 43 9 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_45_1 magplc4-B2 43 10 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_45_3 magplc4-B2 43 11 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_45_3 magplc4-B2 43 12 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_47_1 magplc4-B2 43 13 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_47_1 magplc4-B2 43 14 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SX_47_3 magplc4-B2 43 15 5 4 5001 00F0 0200 0600 0A00 0E00 |
!SY_47_3 magplc4-B2 43 16 5 4 5001 00F0 0200 0600 0A00 0E00 |
! |
! Pulse Steering |
! |
!PX_48_4 magplc5-A3 44 1 20 4 5001 0014 0200 0600 0A00 0E00 |
!PY_48_4 magplc5-A3 44 2 10 4 5001 0014 0200 0600 0A00 0E00 |
! |
! ### MAIN LINAC : 5 SECTOR ### |
! |
! [0] CONTROLLERS |
! |
! s.u, jul.15.2021, remove magplcECS2 |
! |
! BT5-1 magplc5-A 41 1 0 5 6000 0000 0200 0600 0A00 0E00 |
! BT5-2 magplc5-B1 42 1 0 5 6000 0000 0200 0600 0A00 0E00 |
! BT5-3 magplc5-B2 43 1 0 5 6000 0000 0200 0600 0A00 0E00 |
!BT5-4 magplcECS2 45 1 0 6 6000 0000 0200 0600 0A00 0E00 |
!BT5-5 magplcECS1 46 1 0 6 6000 0000 0200 0600 0A00 0E00 |
!BT5-6 magplcECS3 47 1 0 6 6000 0000 0200 0600 0A00 0E00 |
BT6-1 |
magplcECS1 |
46 |
1 |
0 |
6 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
!BT6-2 magplcECS2 45 1 0 6 6000 0000 0200 0600 0A00 0E00 |
BT6-3 |
magplcECS3 |
47 |
1 |
0 |
6 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
BT6-A |
magplc6-A |
48 |
1 |
0 |
6 |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
! [1] CONTROLLER-1 ADR:41 |
! |
!QD/D_52_4 magplc5-A 41 1 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QD_52_4 magplc5-A 41 1 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QF_52_4 magplc5-A 41 2 60 5 5000 00FE 0200 0600 0A00 0E00 |
!QD/D_54_4 magplc5-A 41 3 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QD_54_4 magplc5-A 41 3 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QF_54_4 magplc5-A 41 4 60 5 5000 00FE 0200 0600 0A00 0E00 |
! |
! [2] CONTROLLER-2 ADR:42 |
! |
!QD/D_56_4 magplc5-B1 42 1 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QD_56_4 magplc5-B1 42 1 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QF_56_4 magplc5-B1 42 2 60 5 5000 00FE 0200 0600 0A00 0E00 |
!QD/D_58_4 magplc5-B1 42 3 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QD_58_4 magplc5-B1 42 3 60 5 5000 00FE 0200 0600 0A00 0E00 |
! QF_58_4 magplc5-B1 42 4 60 5 5000 00FE 0200 0600 0A00 0E00 |
! k.f, may.1997, rename, and later restored to the original |
! |
! [3] CONTROLLER-3 ADR:43 |
! |
! aug.26.2005, s.k, interlock change 60 -> f0 |
! jan.19.2017, t.k, rename B[XY]_48_4 -> S[XY]_51_1 |
! remove S[XY]_53_3 |
! t.k sep.2018 remove S[X,Y]_[51,53,55,57]_[1,3] |
! |
!BX_48_4 magplc5-B2 43 1 5 5 5001 00F0 0200 0600 0A00 0E00 |
!BY_48_4 magplc5-B2 43 2 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_51_1 magplc5-B2 43 1 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_51_1 magplc5-B2 43 2 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_51_3 magplc5-B2 43 3 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_51_3 magplc5-B2 43 4 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_53_1 magplc5-B2 43 5 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_53_1 magplc5-B2 43 6 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_53_3 magplc5-B2 43 7 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_53_3 magplc5-B2 43 8 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_55_1 magplc5-B2 43 9 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_55_1 magplc5-B2 43 10 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_55_3 magplc5-B2 43 11 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_55_3 magplc5-B2 43 12 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_57_1 magplc5-B2 43 13 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_57_1 magplc5-B2 43 14 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SX_57_3 magplc5-B2 43 15 5 5 5001 00F0 0200 0600 0A00 0E00 |
!SY_57_3 magplc5-B2 43 16 5 5 5001 00F0 0200 0600 0A00 0E00 |
! |
! [4] CONTROLLER-4 ADR:45 "ECS[2]" |
! |
! s.k. jan.05.2007, interlock change BX/Y_6* 60 -> F0 |
! s.u. Oct.01.2014, remove BX_61_8 |
! t.k. Sep.10.2018, remove B[X,Y]_58_4 |
! rename SY_61_[A1,A2] -> BY_61_[A1,A2] |
! s.u. jul.15.2021, remove magplcECS2 |
! |
!!BX_58_4 magplcECS2 45 2 20 5 5001 0060 0200 0600 0A00 0E00 |
!!BY_58_4 magplcECS2 45 1 20 5 5001 0060 0200 0600 0A00 0E00 |
!BX_61_6 magplcECS2 45 3 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_6 magplcECS2 45 4 5 6 5001 00F0 0200 0600 0A00 0E00 |
!!BX_61_8 magplcECS2 45 5 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_8 magplcECS2 45 6 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_A1 magplcECS2 45 8 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_A2 magplcECS2 45 10 5 6 5001 00F0 0200 0600 0A00 0E00 |
!! n.k. aug.2001 |
!!BX_61_H1 magplcECS2 45 11 20 6 5001 00FE 0200 0600 0A00 0E00 |
!! n.k. jan.2002 |
!BX_61_H1 magplcECS2 45 11 10 6 5001 00FE 0200 0600 0A00 0E00 |
! |
! [5] CONTROLLER-5 ADR:46 "ECS[1]" |
! added by k.f, sep.23.1997. |
! |
! t.k. sep.12.2012, rename BM_61_1/6 -> BM_61_1 |
! BM_61_1/6_POL -> BM_61_1_POL |
! BM_61_2/3/4/5 -> BM_61_A2/3 |
! BM_61_A1/2/3 -> BM_61_A1 |
! BM_61_A1/2/3_POL -> BM_61_A1_POL |
! |
!BM_61_1 magplcECS1 46 1 500 6 4004 00FE 0200 0600 0A00 0E00 |
!BM_61_1_POL magplcECS1 46 2 0 6 4008 0000 0200 0600 0A00 0E00 |
!BM_61_A2/3 magplcECS1 46 3 500 6 4000 00FE 0200 0600 0A00 0E00 |
!!BM_61_A1 magplcECS1 46 4 200 6 4000 00FE 0200 0600 0A00 0E00 |
!BM_61_A1 magplcECS1 46 4 200 6 4004 00FE 0200 0600 0A00 0E00 |
!!BM_61_A1_POL magplcECS1 46 5 0 6 4008 0000 0200 0600 0A00 0E00 |
!BM_61_A1_POL magplcECS1 46 5 0 6 4008 0000 0200 0600 0A00 0E00 |
! |
! n.t. 02.mar.2015, rename BM_61_1 -> BM_61_1/6 |
! BM_61_1_POL -> BM_61_1/6_POL |
! BM_61_A2/A3 -> BM_61_3/4 |
! BM_61_A1 -> BM_61_A2/3 |
! BM_61_A1_POL -> BM_61_A2/3_POL |
! add BM_61_A1 and BM_61_2/5 |
! |
!BM_61_1/6 magplcECS1 46 1 500 6 4004 00FE 0200 0600 0A00 0E00 |
!BM_61_1/6_POL magplcECS1 46 2 0 6 4008 0000 0200 0600 0A00 0E00 |
!BM_61_3/4 magplcECS1 46 3 500 6 4000 00FE 0200 0600 0A00 0E00 |
!BM_61_A2/3 magplcECS1 46 4 200 6 4004 00FE 0200 0600 0A00 0E00 |
!BM_61_A2/3_POL magplcECS1 46 5 0 6 4008 0000 0200 0600 0A00 0E00 |
!BM_61_AS magplcECS1 46 6 400 6 4000 00FE 0200 0600 0A00 0E00 |
!BM_61_A1 magplcECS1 46 13 200 6 4004 00FE 0200 0600 0A00 0E00 |
!BM_61_A1_POL magplcECS1 46 14 0 6 4008 0000 0200 0600 0A00 0E00 |
!BM_61_2/5 magplcECS1 46 15 430 6 4000 00FE 0200 0600 0A00 0E00 |
! |
QD_61_6 |
magplcECS1 |
46 |
7 |
50 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_61_6 |
magplcECS1 |
46 |
8 |
50 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_61_8 |
magplcECS1 |
46 |
9 |
50 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QD_61_8 |
magplcECS1 |
46 |
10 |
50 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
! |
! n.t, sep.14.2008, change interlock BE -> FE |
!QD_61_A1 magplcECS1 46 11 35 6 5000 00BE 0200 0600 0A00 0E00 |
!QF_61_A1 magplcECS1 46 12 35 6 5000 00BE 0200 0600 0A00 0E00 |
QD_61_A1 |
magplcECS1 |
46 |
11 |
35 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_61_A1 |
magplcECS1 |
46 |
12 |
35 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
! |
! [6] CONTROLLER-6 ADR:47 "ECS[3]" |
! k.f, mar.1998 |
! |
BS_61_1 |
magplcECS3 |
47 |
1 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_2 |
magplcECS3 |
47 |
2 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_3 |
magplcECS3 |
47 |
3 |
5 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_4 |
magplcECS3 |
47 |
4 |
5 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_5 |
magplcECS3 |
47 |
5 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_6 |
magplcECS3 |
47 |
6 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_A1 |
magplcECS3 |
47 |
7 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_A2 |
magplcECS3 |
47 |
8 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BS_61_A3 |
magplcECS3 |
47 |
9 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
BX_61_H1 |
magplcECS3 |
47 |
10 |
10 |
6 |
5001 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
!BS_61_AS magplcECS3 47 11 10 6 5001 00FE 0200 0600 0A00 0E00 |
! BS_61_L magplcECS3 47 10 10 6 5001 00FE 0200 0600 0A00 0E00 |
! |
! [7] CONTROLLER-7 ADR:48 "6-A" for PF-BT |
! k.f, aug.2005 |
! |
! |
! s.k, sep.01.2005 change interlock Q[DF]_61_F2 F8 -> FE |
! t.k, jan.28.2016 remove BM_58_1 |
! t.k, sep.28.2016 remove QF_61_F1 |
! rename QD_61_F1 -> QF_61_F1 |
! rename QF_61_F3 -> QD_61_F3 |
! rename QD_61_F5 -> QF_61_F5 |
! t.k, sep.05.2017 add QD_61_F2, BX_58_F1 |
! rename QD_61_F3 -> QF_61_F3 |
! rename QF_61_F5 -> QD_61_F5 |
! s.u, jul.15.2021 remove BY_58_F1,BY_61_F1,BX_61_F3,BY_61_F5,BX_58_F1,BS_61_F1,BS_61_F4 |
! |
!BM_58_1 magplc6-A 48 1 200 6 5000 0076 0200 0600 0A00 0E00 |
BM_61_F1 |
magplc6-A |
48 |
2 |
200 |
6 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
BM_61_F4 |
magplc6-A |
48 |
3 |
200 |
6 |
5000 |
0076 |
0200 |
0600 |
0A00 |
0E00 |
QD_61_F2 |
magplc6-A |
48 |
4 |
35 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_61_F1 |
magplc6-A |
48 |
5 |
35 |
6 |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
QF_61_F3 |
magplc6-A |
48 |
6 |
3 |
6 |
5000 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
QD_61_F5 |
magplc6-A |
48 |
7 |
3 |
6 |
5000 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
!BY_61_F0 magplc6-A 48 15 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_58_F1 magplc6-A 48 15 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_F1 magplc6-A 48 9 3 6 5001 00F0 0200 0600 0A00 0E00 |
!BX_61_F3 magplc6-A 48 10 3 6 5001 00F0 0200 0600 0A00 0E00 |
!BY_61_F5 magplc6-A 48 11 3 6 5001 00F0 0200 0600 0A00 0E00 |
! BS_58_1 magplc6-A 48 12 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BX_58_F1 magplc6-A 48 12 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BS_61_F1 magplc6-A 48 13 5 6 5001 00F0 0200 0600 0A00 0E00 |
!BS_61_F4 magplc6-A 48 14 5 6 5001 00F0 0200 0600 0A00 0E00 |
! |
! slow positron [S-A], nov.2006, k.f |
! |
! s.k. sep07.2008. change interlock bit ML_S1_G1 - SY_S1_1 B8 => F0/28 => F0 |
BTS-A1 |
magplcS-A1 |
41 |
1 |
0 |
D |
6000 |
0000 |
0200 |
0600 |
0A00 |
0E00 |
! |
SL_S1_G1/P1 |
magplcS-A1 |
41 |
1 |
35 |
D |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
SL_S1_P2/B1 |
magplcS-A1 |
41 |
2 |
35 |
D |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
SL_S1_B2/3/4/5 |
magplcS-A1 |
41 |
3 |
35 |
D |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
SL_S1_B6/7 |
magplcS-A1 |
41 |
4 |
35 |
D |
5000 |
00FE |
0200 |
0600 |
0A00 |
0E00 |
ML_S1_G1 |
magplcS-A1 |
41 |
5 |
5 |
D |
5000 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
QD/D_S1_1 |
magplcS-A1 |
41 |
6 |
5 |
D |
5000 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
QF_S1_1 |
magplcS-A1 |
41 |
7 |
5 |
D |
5000 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_S1_G1 |
magplcS-A1 |
41 |
9 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_S1_G1 |
magplcS-A1 |
41 |
10 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_S1_B1 |
magplcS-A1 |
41 |
11 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_S1_B1 |
magplcS-A1 |
41 |
12 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SX_S1_1 |
magplcS-A1 |
41 |
13 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
SY_S1_1 |
magplcS-A1 |
41 |
14 |
5 |
D |
5001 |
00F0 |
0200 |
0600 |
0A00 |
0E00 |
! |
!MAGNETNAMES_MAGNETNAMES do not remove this line |
! below are the magnet names which are not the same as power supply names |
! |
! generated by extractalias.sh and hand-edited, Jan.8.1998, k.f |
! |
!QD_A1_B8 QD/D_A1_B8 0 0 0 0 5200 0 0 0 0 0 |
!BM_A1_C1 BM_A1_C1/2/3/4 0 0 0 0 5204 0 0 0 0 0 |
!BM_A1_C2 BM_A1_C1/2/3/4 0 0 0 0 5204 0 0 0 0 0 |
!BM_A1_C3 BM_A1_C1/2/3/4 0 0 0 0 5204 0 0 0 0 0 |
!BM_A1_C4 BM_A1_C1/2/3/4 0 0 0 0 5204 0 0 0 0 0 |
!QD_A1_C5 QD/D_A1_C5 0 0 0 0 5200 0 0 0 0 0 |
!QD_A1_1 QD/D_A1_1 0 0 0 0 5200 0 0 0 0 0 |
!QD_A1_2 QD/D_A1_2 0 0 0 0 5200 0 0 0 0 0 |
!QD_A1_M QD/D_A1_M 0 0 0 0 5200 0 0 0 0 0 |
SL_A1_G3 |
SL_A1_G3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_G4 |
SL_A1_G3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_G5 |
SL_A1_G5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_G6 |
SL_A1_G5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S1 |
SL_A1_S1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S2 |
SL_A1_S1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S3 |
SL_A1_S3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S4 |
SL_A1_S3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S5 |
SL_A1_S5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S6 |
SL_A1_S5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S7 |
SL_A1_S7/8 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_S8 |
SL_A1_S7/8 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B2 |
SL_A1_B2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B3 |
SL_A1_B2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B4 |
SL_A1_B4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B5 |
SL_A1_B4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B6 |
SL_A1_B6/7 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_A1_B7 |
SL_A1_B6/7 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A2_1 |
QD/D_A2_1 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A2_2 |
QD/D_A2_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A2_3 |
QD/D_A2_3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A2_4 |
QD/D_A2_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A3_2 |
QD/D_A3_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A3_4 |
QD/D_A3_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A4_2 |
QD/D_A4_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_A4_4 |
QD/D_A4_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B1_4 |
QD/D_B1_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B2_4 |
QD/D_B2_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B3_4 |
QD/D_B3_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B4_4 |
QD/D_B4_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B5_4 |
QD/D_B5_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B6_4 |
QD/D_B6_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_B7_4 |
QD/D_B7_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
!QF_R0_14 QF_R0_14/51 0 0 0 0 5200 0 0 0 0 0 |
!QF_R0_51 QF_R0_14/51 0 0 0 0 5200 0 0 0 0 0 |
!QD_R0_22 QD_R0_22/42 0 0 0 0 5200 0 0 0 0 0 |
!QD_R0_42 QD_R0_22/42 0 0 0 0 5200 0 0 0 0 0 |
!QF_R0_23 QF_R0_23/41 0 0 0 0 5200 0 0 0 0 0 |
!QF_R0_41 QF_R0_23/41 0 0 0 0 5200 0 0 0 0 0 |
!SF_R0_13 SF_R0_13/52 0 0 0 0 5200 0 0 0 0 0 |
!SF_R0_52 SF_R0_13/52 0 0 0 0 5200 0 0 0 0 0 |
!SF_R0_21 SF_R0_21/43 0 0 0 0 5200 0 0 0 0 0 |
!SF_R0_43 SF_R0_21/43 0 0 0 0 5200 0 0 0 0 0 |
!SD_R0_31 SD_R0_31/33 0 0 0 0 5200 0 0 0 0 0 |
!SD_R0_33 SD_R0_31/33 0 0 0 0 5200 0 0 0 0 0 |
BM_R0_1 |
BM_R0_1/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_R0_6 |
BM_R0_1/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_R0_2 |
BM_R0_2/3/4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_R0_3 |
BM_R0_2/3/4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_R0_4 |
BM_R0_2/3/4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_R0_5 |
BM_R0_2/3/4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G1 |
SL_CT_G1/2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G2 |
SL_CT_G1/2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G3 |
SL_CT_G1/2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G4 |
SL_CT_G4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G5 |
SL_CT_G4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G6 |
SL_CT_G4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G7 |
SL_CT_G7/8 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_G8 |
SL_CT_G7/8 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_P1 |
SL_CT_P1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_P2 |
SL_CT_P1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B1 |
SL_CT_B1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B2 |
SL_CT_B1/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B3 |
SL_CT_B3/4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B4 |
SL_CT_B3/4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B5 |
SL_CT_B3/4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B6 |
SL_CT_B3/4/5/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B7 |
SL_CT_B7/8/9 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B8 |
SL_CT_B7/8/9 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_CT_B9 |
SL_CT_B7/8/9 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_17_C4 |
QD_17_C4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_17_C4 |
QF_17_C4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_17_C5 |
QD_17_C4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_17_C5 |
QF_17_C4/5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
! |
! sep.2000 by n.k. |
!SL_21_T/13/23/35 SL_21_T/35 0 0 0 0 5200 0 0 0 0 0 |
!SL_21_T SL_21_T/35 0 0 0 0 5200 0 0 0 0 0 |
SL_21_11/12/13/21/22/23 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_11 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_12 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_13 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_21 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_22 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_23 |
SL_21_11/23 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
! |
SL_21_31/32/33/34/35/41/42/43/44 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_31 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_32 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_33 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_34 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_35 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_41 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_42 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_43 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
SL_21_44 |
SL_21_31/44 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
! |
QD_21_45 |
QD/D_21_45 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_21_K1 |
BM_21_K1/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_21_K4 |
BM_21_K1/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_21_K2 |
BM_21_K2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_21_K3 |
BM_21_K2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_21_K5 |
QD/D_21_K5 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF/D/F_22_12/3/4 |
QF/D/F_22_12 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_22_12 |
QF/D/F_22_12 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_22_13 |
QF/D/F_22_12 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_22_14 |
QF/D/F_22_12 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_22_21 |
QF/D_22_21/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_22_22 |
QF/D_22_21/2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_22_23 |
QF/D_22_23/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_22_24 |
QF/D_22_23/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD/F/D_22_31/2/3 |
QD/F/D_22_31 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_22_31 |
QD/F/D_22_31 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QF_22_32 |
QD/F/D_22_31 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_22_33 |
QD/F/D_22_31 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD/F/D_22_41/2/3 |
QD/F/D_22_41 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
!QD_22_41 QD/F/D_22_41 0 0 0 0 5200 0 0 0 0 0 |
!QF_22_42 QD/F/D_22_41 0 0 0 0 5200 0 0 0 0 0 |
!QD_22_43 QD/F/D_22_41 0 0 0 0 5200 0 0 0 0 0 |
QF_23_12 |
QF/D_23_12/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_23_13 |
QF/D_23_12/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
!QD/F/D_23_21/2/3 QD/F/D_23_21 0 0 0 0 5200 0 0 0 0 0 |
!QD_23_21 QD/F/D_23_21 0 0 0 0 5200 0 0 0 0 0 |
!QF_23_22 QD/F/D_23_21 0 0 0 0 5200 0 0 0 0 0 |
!QD_23_23 QD/F/D_23_21 0 0 0 0 5200 0 0 0 0 0 |
!QD_23_31 QD/F_23_31/2 0 0 0 0 5200 0 0 0 0 0 |
!QF_23_32 QD/F_23_31/2 0 0 0 0 5200 0 0 0 0 0 |
!QD_23_43 QD/D_23_43 0 0 0 0 5200 0 0 0 0 0 |
QD_24_1 |
QD/D_24_1 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_24_2 |
QD/D_24_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_24_3 |
QD/D_24_3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_24_4 |
QD/D_24_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_26_1 |
QD/D_26_1 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_26_2 |
QD/D_26_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_26_3 |
QD/D_26_3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_26_4 |
QD/D_26_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_27_2 |
QD/D_27_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_27_4 |
QD/D_27_4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
QD_28_2 |
QD/D_28_2 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
!QD_28_4 QD/D_28_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_36_4 QD/D_36_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_38_4 QD/D_38_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_42_4 QD/D_42_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_44_4 QD/D_44_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_46_4 QD/D_46_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_48_4 QD/D_48_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_52_4 QD/D_52_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_54_4 QD/D_54_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_56_4 QD/D_56_4 0 0 0 0 5200 0 0 0 0 0 |
!QD_58_4 QD/D_58_4 0 0 0 0 5200 0 0 0 0 0 |
! k.f, mar,may.1998 |
! n.k. jan.2002 removed (BM_17_C1/2/3/4 is removed on Sep.01) |
! k.f, sep.2004 re-enabled |
! t.k, sep.2012 remove BM_61_1,BM_61_6,BM_61_2,BM_61_3,BM_61_4,BM_61_5,BM_61_A1 |
! modify BM_61_A2 BM_61_A1/2/3 -> BM_61_A2/3 |
! modify BM_61_A3 BM_61_A1/2/3 -> BM_61_A2/3 |
! t.k, sep.2015 add alias BM_61_1,BM_61_1_POL |
! |
BM_17_C1 |
BM_17_C1/2/3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_17_C2 |
BM_17_C1/2/3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_17_C3 |
BM_17_C1/2/3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_17_C4 |
BM_17_C1/2/3/4 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_61_1 |
BM_61_1/6 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_61_1_POL |
BM_61_1/6_POL |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
!BM_61_6 BM_61_1/6 0 0 0 0 5200 0 0 0 0 0 |
!BM_61_2 BM_61_2/3/4/5 0 0 0 0 5200 0 0 0 0 0 |
!BM_61_3 BM_61_2/3/4/5 0 0 0 0 5200 0 0 0 0 0 |
!BM_61_4 BM_61_2/3/4/5 0 0 0 0 5200 0 0 0 0 0 |
!BM_61_5 BM_61_2/3/4/5 0 0 0 0 5200 0 0 0 0 0 |
!BM_61_A1 BM_61_A1/2/3 0 0 0 0 5200 0 0 0 0 0 |
BM_61_A2 |
BM_61_A2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
BM_61_A3 |
BM_61_A2/3 |
0 |
0 |
0 |
0 |
5200 |
0 |
0 |
0 |
0 |
0 |
! |
! aliases dec.15.1997. k.f |
! |
! aliases jan.6.2000. k.f |
! |
SX_A1_22 |
BX_A1_22 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SX_A1_B8 BX_A1_B8 0 0 0 0 5201 0 0 0 0 0 |
SX_A1_C5 |
BX_A1_C5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!BX_A1_M SX_A1_M 0 0 0 0 5201 0 0 0 0 0 |
SX_C5_1 |
BX_C5_1 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_C7_4 |
BX_C7_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SX_R0_01 BX_R0_01 0 0 0 0 5201 0 0 0 0 0 |
!SX_R0_63 BX_R0_63 0 0 0 0 5201 0 0 0 0 0 |
SY_A1_22 |
BY_A1_22 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SY_A1_B8 BY_A1_B8 0 0 0 0 5201 0 0 0 0 0 |
SY_A1_C5 |
BY_A1_C5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
BY_A1_M |
SY_A1_M |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_C5_1 |
BY_C5_1 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_C7_4 |
BY_C7_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SY_R0_01 BY_R0_01 0 0 0 0 5201 0 0 0 0 0 |
SY_R0_23 |
BY_R0_23 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_R0_41 |
BY_R0_41 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SY_R0_63 BY_R0_63 0 0 0 0 5201 0 0 0 0 0 |
SX_17_4 |
BX_17_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_21_K5 |
BX_21_K5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_22_32 |
BX_22_32 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_23_12 |
BX_23_12 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_23_31 |
BX_23_31 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_23_4 |
BX_23_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_58_4 |
BX_58_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_61_6 |
BX_61_6 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SX_61_8 BX_61_8 0 0 0 0 5201 0 0 0 0 0 |
SY_17_4 |
BY_17_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_21_K5 |
BY_21_K5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_22_31 |
BY_22_31 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_23_11 |
BY_23_11 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_23_31 |
BY_23_31 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_23_4 |
BY_23_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_58_4 |
BY_58_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_61_6 |
BY_61_6 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_61_8 |
BY_61_8 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_15_1 |
BX_14_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SX_17_C4 |
BX_17_C5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SX_31_1 BX_28_4 0 0 0 0 5201 0 0 0 0 0 |
BX_28_4 |
SX_31_1 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SX_41_1 BX_38_4 0 0 0 0 5201 0 0 0 0 0 |
!SX_51_1 BX_48_4 0 0 0 0 5201 0 0 0 0 0 |
SY_15_1 |
BY_14_4 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
SY_17_C4 |
BY_17_C5 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SY_31_1 BY_28_4 0 0 0 0 5201 0 0 0 0 0 |
BY_28_4 |
SY_31_1 |
0 |
0 |
0 |
0 |
5201 |
0 |
0 |
0 |
0 |
0 |
!SY_41_1 BY_38_4 0 0 0 0 5201 0 0 0 0 0 |
!SY_51_1 BY_48_4 0 0 0 0 5201 0 0 0 0 0 |
! |
! aliases sep.26.2012. t.k. |
! |
!BM_61_1/6 BM_61_1 0 0 0 0 5201 0 0 0 0 0 |
!BM_61_1/6_POL BM_61_1_POL 0 0 0 0 5201 0 0 0 0 0 |
! |
! |
! aliases oct.09.2016. t.k |
! |
! QD/D_36_4 QD_36_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_38_4 QD_38_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_42_4 QD_42_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_44_4 QD_44_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_46_4 QD_46_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_48_4 QD_48_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_52_4 QD_52_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_54_4 QD_54_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_56_4 QD_56_4 0 0 0 0 5200 0 0 0 0 0 |
! QD/D_58_4 QD_58_4 0 0 0 0 5200 0 0 0 0 0 |